rk3588: ddr: update ddr bin to v1.18
Build from: 9fa84341ce dram_init: rk3588: update tx eye margin Update features: 1. Add dvfs/periodic training to improve write signal margin. 2. Support mixed package DRAM. Warn: BL31 should be update to V1.47 or above. Signed-off-by: Tang Yun ping <typ@rock-chips.com> Change-Id: I14928c3b33ab6a0468f1d4b150c0e7025f04d48b
This commit is contained in:
committed by
Joseph Chen
parent
3e5f2374e7
commit
b9183559ca
@@ -5,7 +5,7 @@ MAJOR=1
|
||||
MINOR=11
|
||||
[CODE471_OPTION]
|
||||
NUM=1
|
||||
Path1=bin/rk35/rk3583_ddr_lp4_1848MHz_lp5_2112MHz_v1.14.bin
|
||||
Path1=bin/rk35/rk3583_ddr_lp4_1848MHz_lp5_2112MHz_v1.18.bin
|
||||
Sleep=1
|
||||
[CODE472_OPTION]
|
||||
NUM=1
|
||||
@@ -14,10 +14,10 @@ Path1=bin/rk35/rk3588_usbplug_v1.11.bin
|
||||
NUM=2
|
||||
LOADER1=FlashData
|
||||
LOADER2=FlashBoot
|
||||
FlashData=bin/rk35/rk3583_ddr_lp4_1848MHz_lp5_2112MHz_v1.14.bin
|
||||
FlashData=bin/rk35/rk3583_ddr_lp4_1848MHz_lp5_2112MHz_v1.18.bin
|
||||
FlashBoot=bin/rk35/rk3588_spl_v1.13.bin
|
||||
[OUTPUT]
|
||||
PATH=rk3583_spl_loader_v1.14.113.bin
|
||||
PATH=rk3583_spl_loader_v1.18.113.bin
|
||||
[SYSTEM]
|
||||
NEWIDB=true
|
||||
[FLAG]
|
||||
|
||||
@@ -5,7 +5,7 @@ MAJOR=1
|
||||
MINOR=11
|
||||
[CODE471_OPTION]
|
||||
NUM=1
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
Sleep=1
|
||||
[CODE472_OPTION]
|
||||
NUM=1
|
||||
@@ -14,10 +14,10 @@ Path1=bin/rk35/rk3588_usbplug_v1.11.bin
|
||||
NUM=2
|
||||
LOADER1=FlashData
|
||||
LOADER2=FlashBoot
|
||||
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
|
||||
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
FlashBoot=bin/rk35/rk3588_spl_v1.13.bin
|
||||
[OUTPUT]
|
||||
PATH=rk3588_spl_loader_v1.17.113.bin
|
||||
PATH=rk3588_spl_loader_v1.18.113.bin
|
||||
[SYSTEM]
|
||||
NEWIDB=true
|
||||
[FLAG]
|
||||
|
||||
@@ -5,7 +5,7 @@ MAJOR=1
|
||||
MINOR=11
|
||||
[CODE471_OPTION]
|
||||
NUM=1
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
Sleep=1
|
||||
[CODE472_OPTION]
|
||||
NUM=1
|
||||
@@ -14,11 +14,11 @@ Path1=bin/rk35/rk3588_usbplug_v1.11.bin
|
||||
NUM=2
|
||||
LOADER1=FlashData
|
||||
LOADER2=FlashBoot
|
||||
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
|
||||
FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
FlashBoot=bin/rk35/rk3588_spl_v1.13.bin
|
||||
[OUTPUT]
|
||||
PATH=rk3588_download_v1.17.113.bin
|
||||
IDB_PATH=rk3588_idblock_v1.17.113.img
|
||||
PATH=rk3588_download_v1.18.113.bin
|
||||
IDB_PATH=rk3588_idblock_v1.18.113.img
|
||||
[SYSTEM]
|
||||
NEWIDB=true
|
||||
[FLAG]
|
||||
|
||||
@@ -5,7 +5,7 @@ MAJOR=1
|
||||
MINOR=11
|
||||
[CODE471_OPTION]
|
||||
NUM=1
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
Sleep=1
|
||||
[CODE472_OPTION]
|
||||
NUM=1
|
||||
|
||||
@@ -5,7 +5,7 @@ MAJOR=1
|
||||
MINOR=6
|
||||
[CODE471_OPTION]
|
||||
NUM=1
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin
|
||||
Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
Sleep=1
|
||||
[CODE472_OPTION]
|
||||
NUM=1
|
||||
@@ -17,7 +17,7 @@ LOADER2=FlashBoot
|
||||
FlashData=bin/rk35/rk3588_ramboot_null0.bin
|
||||
FlashBoot=bin/rk35/rk3588_ramboot_null1.bin
|
||||
[OUTPUT]
|
||||
PATH=rk3588_ramboot_loader_v1.17.106.bin
|
||||
PATH=rk3588_ramboot_loader_v1.18.106.bin
|
||||
[SYSTEM]
|
||||
NEWIDB=true
|
||||
[FLAG]
|
||||
|
||||
Binary file not shown.
BIN
bin/rk35/rk3583_ddr_lp4_1848MHz_lp5_2112MHz_v1.18.bin
Normal file
BIN
bin/rk35/rk3583_ddr_lp4_1848MHz_lp5_2112MHz_v1.18.bin
Normal file
Binary file not shown.
Binary file not shown.
BIN
bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
Normal file
BIN
bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
Normal file
Binary file not shown.
@@ -1,5 +1,28 @@
|
||||
# RK3588 Release Note
|
||||
|
||||
## rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
|
||||
| 时间 | 文件 | 编译 commit | 重要程度 |
|
||||
| ---------- | :------------------------------------------- | ----------- | -------- |
|
||||
| 2024-09-05 | rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin | 9fa84341ce | 重要 |
|
||||
|
||||
### Warn
|
||||
|
||||
1. 要求BL31版本必须同步更新到V1.47或更高版本。
|
||||
|
||||
### New
|
||||
|
||||
1. 使能dvfs/periodic training, 增加信号余量。
|
||||
2. 增加mixed封装颗粒(x16/x8混合封装)的支持。
|
||||
|
||||
### Fixed
|
||||
|
||||
| Index | 重要程度 | 更新说明 | 问题现象 | 问题来源 |
|
||||
| ----- | -------- | ---------------------------------- | -------- | -------- |
|
||||
| 1 | 重要 | 修正tTOT配置,以提高个别颗粒兼容性 | - | - |
|
||||
|
||||
------
|
||||
|
||||
## rk3588_bl31_v1.47.elf
|
||||
|
||||
| 时间 | 文件 | 编译 commit | 重要程度 |
|
||||
|
||||
@@ -1,5 +1,28 @@
|
||||
# RK3588 Release Note
|
||||
|
||||
## rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin
|
||||
|
||||
| Date | File | Build commit | Severity |
|
||||
| ---------- | :------------------------------------------- | ------------ | --------- |
|
||||
| 2024-09-05 | rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin | 9fa84341ce | important |
|
||||
|
||||
### Warn
|
||||
|
||||
1. BL31 should be update to V1.47 or above.
|
||||
|
||||
### New
|
||||
|
||||
1. Enable dvfs/periodic training to increase SI margin.
|
||||
2. Added support for (x16/x8)mixed packaging particles.
|
||||
|
||||
### Fixed
|
||||
|
||||
| Index | Severity | Update | Issue description | Issue source |
|
||||
| ----- | --------- | --------------------------------------------------------- | ----------------- | ------------ |
|
||||
| 1 | important | Modified tTOT configuration to improve DRAM compatibility | - | - |
|
||||
|
||||
------
|
||||
|
||||
## rk3588_bl31_v1.47.elf
|
||||
|
||||
| Date | File | Build commit | Severity |
|
||||
|
||||
Reference in New Issue
Block a user