rk3568: bl31: update version to v1.33
Build from ATF commit:
ae7c295ca rockchip: scmi: base: fix protocol list response size
update feature:
ae7c295ca rockchip: scmi: base: fix protocol list response size
834a4578c plat: rockchip: scmi: Add support to set low length for cpub
5d208a630 plat: rockchip: scmi: not allowed rate = 0 to set rate
37771fb0f rockchip: cpus_on_fixed_addr.S: ldr instead of adr for Position-independent
61463dac0 plat: rockchip: support aes_ctr.
bd56a9a02 plat: rockchip: support config irq aff by sip call
fc6a6b092 rockchip: plat_pm: add functions for cpu on/suspend resume
c0152bd35 opteed: Mask non-secure interrupts if the cpus will be off
5d54ce865 plat: rk3568: fix pwm0 output error when exit ultra suspend
8f8c332d6 plat: rk3568: support to config cache write streaming
3f58c537b rockchip: common: Add boot1 param for atags
698f83a30 rockchip: gicv3: add plat_rockchip_gic_its_quiescent function
67c9cdc3e lib: psci: Add weak psci_plat_system_suspend_prepare()
cb84541ac plat: rk3568: set the ATF RAM as secure
29d00ad58 rockchip: gicv3: support getting routing cpu.
898fdcd8a rockchip: only use plat_uart_base to initialize console
0337c56f8 plat: rockchip: scmi: mark clk_ops as const
c2e74efff rockchip: support sram_reuse section
d1849fccd plat: rockchip: add system control function for OPTEED.
5057c23a4 plat: rk3568: dmc: set NOC response type when change ddr freq
31f716829 plat: rk3568: sram init section use RW attribute
87a9dbe8e rockchip: scmi_clock: return cur_rate if no get_rate ops or get_rate return 0
58314759f make.sh: compile with "ARM_ARCH_MINOR"
58dc14a62 rockchip: fiq-debugger: fix error if fiq from el0
5bd6aa529 plat: rk3568: dmc: disable clk drv when suspend for ultar board
8e24b5662 plat: rk3568: dmc: remove struct ddr_dts_config_timing
5bede8da8 rockchip: simplify cpu_context's initialization
4edcdbb82 plat: rk3568: dmc: no longer get ddr timing from DTS
24ab016fc plat: rk3568: add support dfs_fsp_init
e7ed08b1f plat: rockchip: dram: update ddr_params.h
23d3e9d8b plat: rockchip: update rockchip_sip_svc for support dfs_fsp_init
78c6a27b5 plat: rk3568: use sram init section
c9a647cae plat: rk3568: dmc: update dcf code to v1.08
Change-Id: Ia3bf2c2b89351547eb02710f982a6749590c169c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This commit is contained in:
@@ -5,7 +5,7 @@ MINOR=0
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SEC=0
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[BL31_OPTION]
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SEC=1
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PATH=bin/rk35/rk3568_bl31_v1.32.elf
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PATH=bin/rk35/rk3568_bl31_v1.33.elf
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ADDR=0x00040000
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[BL32_OPTION]
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SEC=1
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