rk3588: ddr: update ddr bin to v1.04

build from:
    74cb20d2b7 rk3588: ddr: update ddr bin to v1.04

build command:
    ./make.sh rk3588

update feature:
    9ff0a6b00f rk3588: ddr: phy preset assert time add to 10us
    5b8bbbb17c rk3588: ddr: ddr useful address 1MB align for kernel
    c573e8eee3 rk3588: ddr: set EN_LOW_POWER(0) to disable dfi lp cfg
    39846fffa8 rk3588: ddr: enable change frequency for LPDDR4
    363a13da91 rk3588: ddr: fix the code about test for DFS/SUSPEND/REBOOT
    65dd9468d2 rk3588: ddr: set DFILPCFG0.dfi_lp_en_data to 0
    574deae90a rk3588: ddr: add memset for sdram_params_fsp in ddr_set_rate
    4872d02a4e rk3588: ddr: enable PHY VTC at any frequency

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id4854bed49b79eae8947952f46892b8d10ef0f0c

RKBOOT/RK3588MINIALL.ini

@@ -5,7 +5,7 @@ MAJOR=1
 MINOR=1
 [CODE471_OPTION]
 NUM=1
-Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin
+Path1=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.04.bin
 Sleep=1
 [CODE472_OPTION]
 NUM=1
@@ -14,10 +14,10 @@ Path1=bin/rk35/rk3588_usbplug_v1.06.bin
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin
+FlashData=bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.04.bin
 FlashBoot=bin/rk35/rk3588_spl_v1.06.bin
 [OUTPUT]
-PATH=rk3588_spl_loader_v1.03.106.bin
+PATH=rk3588_spl_loader_v1.04.106.bin
 [SYSTEM]
 NEWIDB=true
 [FLAG]