rk3568: bl31: update version to v1.21

Build from ATF commit:
	ae0d3958f plat: rk3568: adjust npu pvtpll config
update feature:
	ae0d3958f plat: rk3568: adjust npu pvtpll config
	b86e22653 plat: rk3568: dmc: set ddr clock in phase when suspend
	4f2434ad5 plat: rk3568: save/restore the clock gate contol
	5803d89e7 plat: rk3568: add core_dbgprcr_pwrdown_wfi() for common
	d17c40da3 plat: rk3568: dmc: setting clk_msch_div base on DPLL
	405a815fd plat: rk3568: dmc: ignore CRU_DPLL_CON1.dsmpd when dfs
	a5f3cd0d1 plat: rk3568: add ddr ecc support

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I5a8cba8784690df13cdf5b471b813b8199175cc6
This commit is contained in:
shengfei Xu
2021-04-09 10:10:44 +08:00
committed by Joseph Chen
parent a6f95898db
commit ee0796d874
2 changed files with 1 additions and 1 deletions

View File

@@ -5,7 +5,7 @@ MINOR=0
SEC=0
[BL31_OPTION]
SEC=1
PATH=bin/rk35/rk3568_bl31_v1.20.elf
PATH=bin/rk35/rk3568_bl31_v1.21.elf
ADDR=0x00040000
[BL32_OPTION]
SEC=1