px30: ddr: update ddr init bin to v1.11

print info: print info: DDR Version 1.11 20190328
from commit:
    48fccd8 rk3326: ddr: init code update to v1.11
update feature:
    7220391 rk3326: config: support unalign access
    3a63040 rk3326: ddr: set uart2 m0 iomux if not sd boot
    70cb2ca rk3326: ddr: add atags initialize
    0327858 rk3326: using unify global argument for uart, dram info config

Change-Id: I2b2b165560023b9c57f62c0fe7ad8812ad5a6928
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

RKBOOT/PX30MINIALL.ini

@@ -5,7 +5,7 @@ MAJOR=1
 MINOR=15
 [CODE471_OPTION]
 NUM=1
-Path1=bin/rk33/px30_ddr_333MHz_v1.10.bin
+Path1=bin/rk33/px30_ddr_333MHz_v1.11.bin
 Sleep=1
 [CODE472_OPTION]
 NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_v1.15.bin
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=bin/rk33/px30_ddr_333MHz_v1.10.bin
+FlashData=bin/rk33/px30_ddr_333MHz_v1.11.bin
 FlashBoot=bin/rk33/px30_miniloader_v1.15.bin
 [OUTPUT]
-PATH=px30_loader_v1.10.115.bin
+PATH=px30_loader_v1.11.115.bin

RKBOOT/PX30MINIALL_SLC.ini

@@ -5,7 +5,7 @@ MAJOR=1
 MINOR=07
 [CODE471_OPTION]
 NUM=1
-Path1=bin/rk33/px30_ddr_333MHz_v1.10.bin
+Path1=bin/rk33/px30_ddr_333MHz_v1.11.bin
 Sleep=1
 [CODE472_OPTION]
 NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rk33/px30_usbplug_slc_v1.15.bin
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=bin/rk33/px30_ddr_333MHz_v1.10.bin
+FlashData=bin/rk33/px30_ddr_333MHz_v1.11.bin
 FlashBoot=bin/rk33/px30_miniloader_slc_v1.15.bin
 [OUTPUT]
-PATH=px30_loader_slc_v1.10.115.bin
+PATH=px30_loader_slc_v1.11.115.bin