build in:
e5b9702 rk3326/px30: ddr: Update ddr bin to V2.08 20220817
update feature:
80092f9 rk3326/rk3326-s: reserved for maskrom to add special
parameters
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I55d692a5863eb7aa0640cd5a3ea40ba4b2f6c1eb
from commit:
rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature:
support rk3326s.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Icc5fd6153df1f18d02a58b6f0862fb2c2b457918
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from RK3326_DDR_Init_Simple:
c8ac34ce rk3326/rk3326-s: Update DDR bin to V2.04 20220121
update feature:
255e5ca0 rk3326/rk3326-s: Set dfi_lp_wakeup_sr/pd to 0x0
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I267bf5c6c1389695112b665371d57fccadb9a5d4
build from RK3326_DDR_Init_Simple:
980d865192 rk3326/rk3326-s: Update DDR bin to V2.03 20220121
update feature:
da0ff2abaa rk3326-s: Set ca_odt(REG0x40[13:12]) of LPDDR4 according to bw
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I3b8f9bcf96841815b88e3772d7a3a808eb2435d5
build from RK3326_DDR_Init_Simple:
d6f4cb05c9 rk3326/rk3326-s: Update DDR bin to V2.02 20220118
update feature:
6faa6a326a rk3326-s: Set VDD_logic to 1.0V
8e81392239 rk3326-s: Disable some low power functions to prevent sleep and resume
(level 2) fail
9590d94add px30s: can not support row = 17 of lp4
c699c118bb px30s: modify dfi_tlp_resp to 0xa
df3d5d15fc px30s: modify vdd_logic to 0.9v
0fa00910a4 px30s: clear ddr clk gate for soft reset
08f7c28847 rk3326/rk3326s: Optimize the size of ddr bin
153b747d5f rk3326-s: Fix get_uboot_params() when sdram_params->ch.row_3_4 == 1
3b83b56391 rk3326s: set logic to 1.0V
a8eced54fb rk3326/s: all dram bring up ok
b280140e97 rk3326/s: add debug info
c4b391e8b4 rk3326/rk3326s: modify dfi timing for lp3/2
cec9c2868b rk3326/rk3326s: diff dfi tctrl_delay setting
de967f4b65 rk3326/rk3326s: modify dfi timing
fa9c9e3f4f rk3326s: add fix drv odt config
c534fef2c6 rk3326s: add support lp4
69776fa864 rk3326: inc: add rk3326s phy reg
3a1078c07d RK3326S: modify to PHY_REG_3326S define
fc7426a9a7 rk3326/S: save and restore arm special reg
2651ce4f97 rk3326/S: add check return to smc code
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Id91158b3d6decc57366dc3259e232f24da6b64ce
Build from rk_boot_all commit:
d5c3b6a rk3568: support usb phy reset funcion
update feature:
Enable BL32_BL33_ARM32
Change-Id: If42572c139561946f693fbced39ef08c834f9f02
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
