Build from:
e4e124926e rockchip: spl: Fix fwver prefix
Build command:
./make.sh rv1126 --spl-new --spl-fwver v1.10
Update features:
1. Print and pass the firmware version number.
2. Solve the issue that the backup image is not loaded when
the SPL load or check u-boot.dtb fails.
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Change-Id: Icfa99a6f1398be9395ee5a1763573cc60c2583e4
Build from:
8fef64cfb9 dram_init: rv1126: Update to v1.09
Update feature:
0d2a0f8f86 drivers: ram: rv1126: Detect bus width of DDR3 through read gate, and init DDR3 again
181bc4650d drivers: ram: rv1126: Fix read_mr()
1911c18330 drivers: ram: rv1126: Fix calc of LPDDR4(X) wrlvl_result min_val
9ebc05219a drivers: ram: rv1126: Fix compiler error if CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE == 8
56f3e68665 rv1126: ddr: Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
1c7093e71f drivers: ram: rv1126: define CONFIG_CMD_DDR_TEST_TOOL by default when CONFIG_DRAM_INIT_BUILD
d393fbb5da drivers: ram: rv1126: Adjust the time of sdram_detect_dbw of LPDDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I93ed60c3967a1f5c2c8e11d35d901d61e29148cc
from commit:
rk_boot_all: e6c168
update feature:
src: spinand: Support new devices
Change-Id: I8c91dbc80507c4b90c8e4933c9fbdeb72aef1cbb
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
from commit:
rk_boot_all: e48799: src: spinor: Support 4KB erase aligned
update feature:
Support spinor 4KB erase aligned
Change-Id: Id0fc2751744a7ff1555e919623bc5b57cb650120
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
rk_boot_all c38741 src: spinand: support GD5F2GM7xxG
update feature:
Support new spiflash
Change-Id: I7ba8cf6be24532969700ba432efbdc8a560c3a23
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
rk_boot_all a00b18c src: platform: rv1126: Update to 1.20
build feature:
support new flash devices, W25N512GVEIG, GD5F1GQ4UExxH
Change-Id: I8e5fbea2a0a64cf7dd82b79ae9b15881ed3623e6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
rk_boot_all b9678f6f src: spinand: not cache recheck for XTX device
build feature:
support new flash devices
Change-Id: I5e72a26108fa7004a61f8caf1acf8e162bb7ff80
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from u-boot-ddr:
2a4cd42b0e dram_init: rv1126: update to v1.07
build command:
./make.sh rv1126
update feature:
4a3d962809 drivers: ram: rv1126: Support x16 bus width of
LPDDR4(X)
957ed7842b drivers: ram: rv1126: fix incorrect setting of
LPDDR4(X) tRFC
21372cf086 drivers: ram: rv1126: fix data types of wr_lvl result
for wr train
e8897b959f drivers: ram: rv1126: fix sdram_detect_row of LPDDR4/X
1ad4a306e5 drivers: ram: rv1126: Use ARRAY_SIZE to calculate
copy size to set ADDRMAP regs
a4bbeacc32 drivers: ram: rv1126: Add addrmap for ddrconf 23~28
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ifda2f31c03d200d65bf08908af280d9fc089c47a
build from u-boot-ddr:
78270c3ffa dram_init: rv1126: update to v1.06
update feature:
d49e7c3403 drivers: ram: rv1126: fix the judgment of "set ctl
address map fail"
06a17b4adf drivers: ram: rv1126: Turn on DQS_c 2k pull-up
resistor to workaround WDQS control of LPDDR4/LPDDR4X
246ad23dbf drivers: ram: rk356x: fix read_mr() of LPDDR3
e90784abb2 rv1126: ddr: fix tx dqs bypass phase setting err
c2a03d5d81 drivers: ram: rv1126: add support lpddr4x
bf922fc800 drivers: ram: rv1126: fix calculating of
MSCH_DeviceSize
e2dc1cc022 drivers: ram: rv1126: Modify tRFC and related timing based on
DDR capacity
330cd12fc3 drivers: ram: rv1126: fix return value of read_mr()
3993b0c711 drivers: ram: rv1126: Set default value of die bus
with to x16 when bus width is x16/x32 of DDR3
9050e1f82e drivers: ram: rv1126: fix tZQLAT of LPDDR4
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I053cb27d5addb4bb85dd88a7780049b95b991029
from commit: 726484
src: slc_flash: Support F59L4G81KAR1AM
Change-Id: I59468d493093496020a3f89915895013e018d73e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from rk_boot_all:
commit id: a409e672ccd: add erase data api for spi nand and slc nand
update feature:
1. support nvm switch function by usb
2. add erase data api for spi nand and slc nand
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ic0754669fdf039e3f37ceb25b0b85121af18edc6
Build from rk_boot_all commit:
0c7ec: src: spinand: Support BWJX08K-2Gb
Update feature:
Support new SPI flash
Change-Id: Id74e5c9dd229cfac116da5521b9ffc90ec868dc6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Build from rk_boot_all commit:
29eb64 src: platform: rv1126: Update to v1.15
Update feature:
Support new SPI flash
Change-Id: Ibc05db6f2dd9dc4e2d707e2cdb8583e1bcb40dc4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from next-dev:
bf803435 rockchip: rk3568: fixup cru node frequency
build command:
./make.sh rv1126
Change-Id: I0676403a3bba4662acf08af6a08ca65cb8149347
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Build from rk_boot_all commit:
a593123211 src: flash: Change to reserve 8 blks for IDB without FTL
Update feature:
Change to reserve 8 blks for IDB without FTL
Change-Id: I69f1341a3569acbb9542bdb68de91b421d8f34fc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from next-dev:
29b0171 rockchip: rv1126: Set BOOT_WATCHDOG flag if reset by WDT
build command:
./make.sh rv1126
Change-Id: Ic24fcaf2dae34b640d525f53e46ebeaf7e4ef053
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from next-dev:
9a4028e rockchip: rv1126: Set BOOT_WATCHDOG flag if reset by WDT
build command:
./make.sh rv1126
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I3dcbe0b97c9f8955e6112e0b02dbdae2b609e0fe
from commit: ff6dc6fe57606621795a57d3cbd29cb72fb2a3e8
Support new SPI flash including GD5F1GQ5UEYIG
Change-Id: I474d37ecbda3f320db3fdeed4baa2d6feb292e6f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Build from:
514da39 clk: rockchip: rk3328: fix up the bus and peri aclk div overflow
Build command:
./make.sh rv1126
Update feature:
support decompress gzip uboot.img
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I86ef2a934030b5401bf4385ba967712d9839ddca
from commit: 4910c7834a05bcbfa94bdc4c6c9a813f2eeec9e8
Update good block searching strategy for open source code
Change-Id: Ic9d803d7e94a849e744f6e9828e09bc5e4d87f8f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
