Build from ATF commit:
6a1e56879 plat: rk3562: clock: Add support change length according to opp flag
update feature:
6a1e56879 plat: rk3562: clock: Add support change length according to opp flag
30f790b61 plat: rk3562: clock: Adjust pvtpll table by otp
159560e89 plat: rk3562: Add otp driver
Change-Id: I0ac3413feb249d8b34682b091dca659d0aede06c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Build from ATF commit:
1f6088dc0 rockchip: rk3562: Change clock to normal pll when supend and reset
update feature:
1f6088dc0 rockchip: rk3562: Change clock to normal pll when supend and reset
Change-Id: I074f4ddbf1e6e6fb0368f318cc32c1205822dafc
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Build from ATF commit:
94b2d40dc plat: rk3568: mask all irqs before entry into opteed
update feature:
94b2d40dc plat: rk3568: mask all irqs before entry into opteed
5e885dc50 plat: rk3568: Improve ultra sleep comments
16574c7f3 rockchip: scmi: change type of "name" in struct scmi_xxx_t to array
112f0e15d rockchip: add functions to check system boot
Change-Id: Ia3fec7f546531b819e73621184f8baee88366ad6
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
4d4f21db2 plat: rk3562: suspend: support vdd_logic off in the system suspend
update feature:
4d4f21db2 plat: rk3562: suspend: support vdd_logic off in the system suspend
5b9e257f1 plat: rk3562: dmc: pause derate MR4 read before release io retention
5a3815fd3 plat: rk3562: dmc: add restore DDR_CTL DERATEEN, DERATEINT and RFSHTMG1
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I9c37230714ab01c2111b693c466b57ca74e72c86
Build from ATF commit:
8f40012ab rockchip: fiq-debugger: support separate stack for os callback
update feature:
8f40012ab rockchip: fiq-debugger: support separate stack for os callback
f3dd7dcba rockchip: fiq-debugger: fix error if fiq from el0
2ffdcf78c rockchip: simplify cpu_context's initialization
680cea638 rockchip: fiq-debugger: put SPSR_EL3 and ELR_EL3 in fiq_dbg_ctx+0x110 and +0x118
cd07d4582 rockchip_exceptions: adjust the usage of uartdbg_uart_info.tgt_cpu
3e4fd0740 rockchip: workaround for gicv3 secure
857e9c1b4 rockchip: fix err of parsing ddr_parameter
Change-Id: I1327b0f45a917b3c64d9046c01e03b75bbceb710
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
== bl31 v1.05:
Build from commit: none
Update feature:
support cpus on/off and auto pd.
support logic off in system suspend
== bl32 v1.00:
Build from optee commit in develop-next branch:
512740e0 rk3562: otp: enable CFG_RK_UBOOT_STORE_OTP
== mcu v1.00:
Build from commit: none
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I44bc06071a2c77663064fe67787c6cb402d48782
Build from ATF commit:
16574c7f3 rockchip: scmi: change type of "name" in struct scmi_xxx_t to array
update feature:
16574c7f3 rockchip: scmi: change type of "name" in struct scmi_xxx_t to array
443c9e1e8 plat: rk3528: clock: Shorten the scmi clock name
ec1ec70eb plat: rk3528: sleep: don't close vpu/rkenc clk for gpioX wakeup
667478ad1
112f0e15d rockchip: add functions to check system boot
1cd72fefa rockchip: fiq-debugger: support separate stack for os callback
Change-Id: I533f6bc6fbebc36846bced15090d5aa1b9f4b120
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
0152b20d0 plat: px30: add amp support
update feature:
0152b20d0 plat: px30: add amp support
227fafce7 rockchip: gicv2: add functions for amp
098982bcc plat: px30: use common gicv2 save/restore function
1cd72fefa rockchip: fiq-debugger: support separate stack for os callback
05d32f7ef plat: rockchip: scmi: Add struct scmi_clock_t args to callbacks
4a8ea5e6d rockchip: add gicv2 save/restore function
946bbd849 plat: px30: sleep: support to use pll-deep-mode
74005d5d9 plat: px30: sleep: set pmu's count by actual pvtm's frequency
Change-Id: Ieb14a1d3646a3ed34c57009d59f0de9fb42031c9
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
0152b20d0 plat: px30: add amp support
update feature:
0152b20d0 plat: px30: add amp support
227fafce7 rockchip: gicv2: add functions for amp
098982bcc plat: px30: use common gicv2 save/restore function
1cd72fefa rockchip: fiq-debugger: support separate stack for os callback
05d32f7ef plat: rockchip: scmi: Add struct scmi_clock_t args to callbacks
4a8ea5e6d rockchip: add gicv2 save/restore function
946bbd849 plat: px30: sleep: support to use pll-deep-mode
74005d5d9 plat: px30: sleep: set pmu's count by actual pvtm's frequency
Change-Id: Id3e631a70eaf9b16f2495bedba94807e66f8f37e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
1cd72fefa rockchip: fiq-debugger: support separate stack for os callback
update feature:
1cd72fefa rockchip: fiq-debugger: support separate stack for os callback
63f1828a0 plat: rk3568: enable sdei
60387e18e rockchip: move sdei related code to common files
05d32f7ef plat: rockchip: scmi: Add struct scmi_clock_t args to callbacks
acebf8b75 plat: rk3568: config l3 partition according to atags.
Change-Id: Idb2abea8e939ba29e7683a9a1f152fb1cbcab185
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
build from rockit-ko commit in master branch:
69d42563 mcu_bin: update version to v1.5.4
build from hal commit in master branch:
a76806e7 project: common: riscv: change riscv toolchain to xpack
Signed-off-by: Chuanhu Sun <aaron.sun@rock-chips.com>
Change-Id: I927ccd49a5930fc7c8c7f7a801bbfba81051857f
Build from ATF commit:
17b41886e plat: rockchip: rk3588: scmi: Add support for rk3588m and rk3588j
update feature:
17b41886e plat: rockchip: rk3588: scmi: Add support for rk3588m and rk3588j
b7b935c63 plat: rk3588: dmc: support both per-bank refresh and derating enabled
Change-Id: Iea2c2ea6f6ba95f5063da817654d4b179e1f22eb
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
build from rockit-ko commit in master branch:
c9653fe9 hpmcu: update version to v1.5.3
build from hal commit in master branch:
a76806e7 project: common: riscv: change riscv toolchain to xpack
Signed-off-by: Chuanhu Sun <aaron.sun@rock-chips.com>
Change-Id: I3e3d75ac1bfc0cfb14d239ea74ce7a1fdb154ba2
Build from ATF commit:
6f45bba91 plat: px30: do second reset if rbrom in px30s
update feature:
6f45bba91 plat: px30: do second reset if rbrom in px30s
99f86f801 plat: px30: disable reset out if reboot normal
8932810e4 plat: px30: resolve misjudgments about reboot_flag
ad0d2e72c plat: px30: compatible with the old loader
01ab909ae rockchip: support plat_bl31_inner.ld.S
Change-Id: Iaa339cb0b89c642a36f21b096a0f789d1a172221
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
6f45bba91 plat: px30: do second reset if rbrom in px30s
update feature:
6f45bba91 plat: px30: do second reset if rbrom in px30s
99f86f801 plat: px30: disable reset out if reboot normal
8932810e4 plat: px30: resolve misjudgments about reboot_flag
ad0d2e72c plat: px30: compatible with the old loader
01ab909ae rockchip: support plat_bl31_inner.ld.S
Change-Id: I7a9711e7bbc20775ee9d0653ad0c5d054f6d1d11
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
6f45bba91 plat: px30: do second reset if rbrom in px30s
update feature:
6f45bba91 plat: px30: do second reset if rbrom in px30s
99f86f801 plat: px30: disable reset out if reboot normal
8932810e4 plat: px30: resolve misjudgments about reboot_flag
ad0d2e72c plat: px30: compatible with the old loader
01ab909ae rockchip: support plat_bl31_inner.ld.S
Change-Id: I7425fb7d230f1cb8c4a767f8cacf0e0fe6b61b25
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
cddd6f52e plat: rk3568: save/restore all GICR in suspend
update feature:
cddd6f52e plat: rk3568: save/restore all GICR in suspend
a410f9c46 plat: rockchip: rk3528: Add scmi clock
a953ce24b plat: rk3588: dmc: disable derate instead of derate_mr4_pause_fc
6f45bba91 plat: px30: do second reset if rbrom in px30s
99f86f801 plat: px30: disable reset out if reboot normal
8932810e4 plat: px30: resolve misjudgments about reboot_flag
90a45ece3 rockchip: support rk3528
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ic8af9dfcf843cba5a11708633a78fb4a16f26a4d
build from:
1089bf090 plat: rk3288: Set pmu can be reset by 1st global reset
update feature:
1089bf090 plat: rk3288: Set pmu can be reset by 1st global reset
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I82b13377a3b252a26e044a7b50f6acd409e999ca
Build from ATF commit:
0252d5c8f plat: rk3308: disable pclk_wdt while system suspend
update feature:
0252d5c8f plat: rk3308: disable pclk_wdt while system suspend
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I7c4b5a71424459d845c3b51098b4259bc396a4cc
build from rockit-ko commit in master branch:
576377cb mcu: update mcu bin to v1.50
build from hal commit in master branch:
a76806e7 project: common: riscv: change riscv toolchain to xpack
Signed-off-by: Chuanhu Sun <aaron.sun@rock-chips.com>
Change-Id: I03a9d64be28267bb1e13361fdc528732ba2bc7b8
Build from ATF commit:
686b5c48b plat: rk3588: sleep: disable gpio 1/3 int if mcu_wakup
update feature:
686b5c48b plat: rk3588: sleep: disable gpio 1/3 int if mcu_wakup
af5ab70fc plat: rockchip: set "plat_uart_base=0" if uart disable
3eb5ebec2 plat: rockchip: uart: wait no busy before restore
6d4252c24 plat: rk3588: secure: only support ddr-4ch,stride-en by default
dc491ee36 plat: rk3588: secure: support config for different ddr-channel number
304673533 plat: rk3588: sleep: support different ddr-channel number
0f4f44e43 plat: rk3588: ddr: add some ddr-channel related functions
9dbfb40af plat: rk3588: secure: simplify secure_region_init function
a7e0c6c06 plat: rk3588: secure: config dsu_mp_sec can access all ddr-regions
988ba1e81 plat: rk3588: move secure related code to secure.c
dee611ca6 plat: rockchip: rk3588: dmc: get LPDDR5 mr16 value from fsp_param
73824e139 plat: rockchip: rk3588: dmc: add support M0_PARAM_INT_VOP
f175a33cf plat: rockchip: rk3588: dmc: force reset if the ddr_m0 is on the halt
a9e5261be plat: rockchip: rk3588: dmc: add bits mask for low power config
8b4543970 plat: rk3588: enable ERRATA_A55_1530923
Change-Id: I041acae523c3b2dba7eb1677411f32d4f1aadba5
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from OPTEE commit in develop-next branch:
4542e1efd rk3588: secure-region: support config for different ddr-channel number
Update features:
4542e1efd rk3588: secure-region: support config for different ddr-channel numbe
Change-Id: I8ea1bd457de2581469001b3d7edf7a1e56ab9014
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from OPTEE commit in develop-next branch:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
Update features:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
cf59606f0 rk3308: delete key reader code which is unused
0af3483b2 pta: crypto_service: support user ta call hard cipher
778974be4 core: tee: calculate node hash with meta default
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I9820efbb5f85239df8ff490710c3e7d3269e976f
Build from OPTEE commit in develop-next branch:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
Update features:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
f22bb78ed rk3358: set user dctrl before key reader init
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Icd3290d45c697048a3debcd495666391835651ad
Build from OPTEE commit in develop-next branch:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
Update features:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
3e2bbe510 rk3326: set user dctrl before key reader init
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I521b9954fa190355bb0e1fc192696eb69ada6095
Build from OPTEE commit in develop-next branch:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
Update features:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
3e2bbe510 rk3326: set user dctrl before key reader init
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I065f9842ad3cf836f04200ee05f825d3d39a6a8b
