build from:
52218f4949 rk3588: ddr: add support print_train_result and print_mr
update feature:
1. Add support print_train_result and print_mr
1. Fixed init fail issue that max freq between 1066-1600MHz.
2. Fixed the issue panic in ddrbin caused by multiple initialization of DDR.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I6fd0bf78a17321ebf2a58608e6fbc173bc895c5b
build from commit:
rtt:f047d6a191#hal:d93ef9fd#battery_ipc:68c599d
build from rt-thread commit in develop branch:
f047d6a1: [Tools]: add battery-ipc repository version information
build from hal commit in master branch:
d93ef9fd: device: rk3568: touch gic everytime in
IRQ_HardIrqPreemptHandler
build from battery-ipc commit in master branch:
68c599d: fast_ae: fix compile warning
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: If0b618b867e6eae9118bbbc683d106ae30ac2b48
build from commit:
rtt:d2d09ba#hal:d93ef9fd#battery_ipc:0534d87
build from rt-thread commit in develop branch:
d2d09ba: release RV1106/RV1103 RT-Thread SDK
build from hal commit in master branch:
d93ef9fd: device: rk3568: touch gic everytime in IRQ_HardIrqPreemptHandler
build from battery-ipc commit in master branch:
0534d87: fastae: sync with aiq v5.0x1.2-rc4
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: I60844d653c6d6a2cefed4a7affdd8b5bb82e5fef
build from commit:
rtt:f047d6a191#hal:d93ef9fd#battery_ipc:68c599d
build from rt-thread commit in develop branch:
f047d6a1: [Tools]: add battery-ipc repository version information
build from hal commit in master branch:
d93ef9fd: device: rk3568: touch gic everytime in IRQ_HardIrqPreemptHandler
build from battery-ipc commit in master branch:
68c599d: fast_ae: fix compile warning
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Ib4333e09a9e8cf6a3d3ace1b410bb6d63baa7971
build from:
992b933606 rk3568: ddr: update ddr bin to v1.17
build command:
./make.sh rk3568
update feature:
1. Added support for 4rank LPDDR3/LPDDR4/LPDDR4x of different rows.
2. Enable derate function for LPDDR4/LPDDR4x.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I39023338802678a5f7380781b58adc888251e68e
build from:
992b933606 rk3568: ddr: update ddr bin to v1.17
build command:
./make.sh rk3568
update feature:
1. Added support for 4rank LPDDR3/LPDDR4/LPDDR4x of different rows.
2. Add DDR ECC poison function support.
3. Enable derate function for LPDDR4/LPDDR4x.
4. Add pstore support when ECC enabled.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ibf34399532706153d98ee3b2f56cde4ca83e8e91
build from commit:
rtt:07ac6e9#hal:d93ef9fd#battery_ipc:04a4e08
build from rt-thread commit in develop branch:
07ac6e9: bsp: rockchip: camera: conver reg list to support i2c continuous writing
build from hal commit in master branch:
d93ef9fd: device: rk3568: touch gic everytime in IRQ_HardIrqPreemptHandler
build from battery-ipc commit in master branch:
04a4e08: fastae: sync with aiq v5.0x1.2-rc5
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I45618153cedff67c7595e6377a68d63c0eb936ef
Build from OPTEE commit in develop-next branch:
dcfdd61d0 rk3568: support for correcting attribute hash
Update features:
dcfdd61d0 rk3568: support for correcting attribute hash
6f10374e5 rk3568: support for correcting root device key
d3c13d5d5 rk3568: support for correcting cpu id data
f514a2989 rk3568: add func for support otp backup
d497d3f64 plat-rockchip: add rk_base.c for common base func
63cf17a51 drivers: hal_crypto: fixed 32-bit platform compilation errors
2e4ec1697 drivers: hal_crypto: fixed CRYPTO crash when using dynamic shared memory
74243eff3 drivers: rockchip: hal_crypto: automatic reset after calculation error
64d17e36f pta: crypto_service: added the address parameter security check
7b8c9847b pta: uboot_storedata_otp: enable kernel read secure boot flag
84db04157 pta: uboot_storedata_otp: enable kernel read vboot key hash
597e4214d core: main: register ddr to enable dynamic SHM
66a458730 core: lpae: increase PGT_CACHE_SIZE when define CFG_WITH_LPAE
ec7e85d54 plat-rockchip: support pstore for optee log
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I2493480b1b6bcbe9bddb0ab8d3eda9abb776a643
build form:
229cf1e07c rk3562: ddr: ultra: update ddrbin to v1.05
update feature:
Verify the DDR data when resume to avoid DDR data stamp
errors during suspend and cause failure to wake up.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I141f976a134793f619d8833452ec2d0054356536
build from:
bf602aff1 plat: rk3568: disable sdei
update feature:
bf602aff1 plat: rk3568: disable sdei
6aca6a078 rockchip: reduce the time waiting for cpu to stop
17f494475 plat: rk3588: delete rockchip_soc_cores_pwr_dm_on_finish_late/resume_late
6f820192d plat: rk3568: delete rockchip_soc_cores_pwr_dm_on_finish_late/resume_late
3b69c1b3d opteed: pm: mask all interrupts before enter to optee
a394bf0a3 plat: rk3562: add the hash calculation for ultra suspend mode
ad741c04f plat: rk3562: save/restore the pmic register in the ultra suspend mode
7e65e9348 plat: rk3562: Add interface to config the MCU
dfd64c37f plat: rk3588: hdmirx: support auto_touch target cpu config
93f1e6233 plat: rk3562: dmc: update dcf code to v1.02
1b2124ab7 plat: rk3528: move bl31_base to 0x80000
9152290e3 plat: rk3562: Add ecc_flag judgment for soc version
256248a10 plat: rk3562: otp: Add support get ecc flag
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: Ide503b0b8fc26b3d635d6ea289bac6ae53cbf1fb
Build from:
6cf9a2f250 dram_init: rv1106: Update to v1.12
Update feature:
dd6f7dc7c6 drivers: ram: rv1106: Fast exit (DLL on) for power down on DDR3
76b28dbce9 drivers: ram: rv1106: Support modify refresh rate in loader_params
ed9d2f002f drivers: ram: rv1106: Fix calc of cs_pst
5af756bb61 drivers: ram: rv1106: Add print when distinguishing DDR2 from DDR3
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I87dd6ceb87479c5827c2957fa057e5b4b8afd359
Build from ATF commit:
1b2124ab7 plat: rk3528: move bl31_base to 0x80000
update feature:
1b2124ab7 plat: rk3528: move bl31_base to 0x80000
7f859117f plat: rk3528: dmc: support both per-bank refresh and derate enabled
1bb3b83ea plat: rockchip: dmc: clear up the head files of dmc driver
7595dc437 rockchip: increase FDT buffer size
bbaa2847c plat: rk3528: dmc: suspend: Add pctl and phy reg that need save
d47912428 plat: rk3528: Add support of dmc
398d70f4c plat: rk3528: support stop cpus
8f84fa572 plat: rockchip: fiq: dsb, isb and nop after wfe in cpu_stop_for_event()
Change-Id: I0cdc7f773a896bbe7a3b2309e69401defdd98206
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
build form:
9152290e3 plat: rk3562: Add ecc_flag judgment for soc version
update feature:
9152290e3 plat: rk3562: Add ecc_flag judgment for soc version
256248a10 plat: rk3562: otp: Add support get ecc flag
7f859117f plat: rk3528: dmc: support both per-bank refresh and derate enabled
2e402e014 plat: rk3568: dmc: support both per-bank refresh and derate enabled
45733ef6d plat: rk3562: dmc: support both per-bank refresh and derate enabled
1bb3b83ea plat: rockchip: dmc: clear up the head files of dmc driver
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Icebca79ee33bb4a9726c87a446fbd51824e9bc71
build from rockit-ko commit in master branch:
d1a2dabb mcu bin: update version to v1.56
build from hal commit in master branch:
a76806e7 project: common: riscv: change riscv toolchain to xpack
Signed-off-by: Chuanhu Sun <aaron.sun@rock-chips.com>
Change-Id: I6b68da9da9c604adc4a1e39d9b98e764d96ca3a2
build from:
f1474cf52f rk3588: ddr: add support spread spectrum mode
update feature:
1. Added more print info when initialization fails to help locate
soldering issues.
2. Optimizing boot time.
3. enable per bank refresh function.
4. LPDDR5 4 channels use different write vref values to improve
stability.
5. First init LPDDR4x.
6. LPDDR5 cavref update to 36%.
7. Add support spread spectrum mode.
Note: BL31 should be update to V1.38
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ie822436500e3d778ba8787e7155e561091d1d997
build form:
7f859117f plat: rk3528: dmc: support both per-bank refresh and derate enabled
update feature:
7f859117f plat: rk3528: dmc: support both per-bank refresh and derate enabled
2e402e014 plat: rk3568: dmc: support both per-bank refresh and derate enabled
45733ef6d plat: rk3562: dmc: support both per-bank refresh and derate enabled
1bb3b83ea plat: rockchip: dmc: clear up the head files of dmc driver
7574315dc plat: rk3568: scmi clock: support adjust pvtpll config by otp
3389cfdda plat: rk3588: dmc: ddr_smc_handler add support ddr_get_stall_time
281c44f67 plat: rockchip: rk3588: dmc: add support spread spectrum mode
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: Ie29d2fb7eb8dc76a41b531a1da7e6d6ef24996fd
build from commit:
rtt:d2d09ba#hal:d93ef9fd#battery_ipc:12da3e7
build from rt-thread commit in develop branch:
d2d09ba: release RV1106/RV1103 RT-Thread SDK
build from hal commit in master branch:
d93ef9fd: device: rk3568: touch gic everytime in IRQ_HardIrqPreemptHandler
build from battery-ipc commit in master branch:
0534d87: fastae: sync with aiq v5.0x1.2-rc4
Signed-off-by: cww <cww@rock-chips.com>
Change-Id: Iefdc6ca6b288b1a4f47d2fa745122e09a2f13c22
from commit:
0661d5 platfrom: rk3568: Update to v1.17
update feature:
Support new spiflash and fix commit(b90bc43 rk3568: usbplug:
revert to the former version v1.16)
Change-Id: Ieeea864f30436e6f03c0f7f2ef02e2b1829f1f8d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from commit:
rtt:c6b03745b#hal:d93ef9fd#battery_ipc:12da3e7
build from rt-thread commit in develop branch:
c6b03745b: bsp: rockchip: board: add dual sc3338 boardcfg
build from hal commit in master branch:
d93ef9fd: device: rk3568: touch gic everytime in IRQ_HardIrqPreemptHandler
build from battery-ipc commit in master branch:
12da3e7: fastae: support set secondary sensor mirror flip
Signed-off-by: cww <cww@rock-chips.com>
Change-Id: I49b153b6f7603838aba80ed4e676e73cdc4485f5
