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Author SHA1 Message Date
Hisping Lin
6d37d42b8b rk3128x: tee with ta: update optee version to v1.94 
build from optee commit:
        7b4ec903 plat-rockchip: config: add configs for dual filesystems

update feature:
        7b4ec903 plat-rockchip: config: add configs for dual filesystems
        778c7c9f libutee: remove storageID check, let TEE kernel validate instead
        4ed35d6f storage: return TEE_ERROR_ITEM_NOT_FOUND when storage ID is unknown

Change-Id: I50efde1c634647ea9f6737d937b8f26ae7520d27
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
 2018-06-06 17:22:12 +08:00
Joseph Chen
ac9e72344b rk3308: bl31: aarch32: add initial version v1.00 
build from commit:
	cd8f09d rk3308: support small memory environment with AArch32 mode

update features:
	cd8f09d rk3308: support small memory environment with AArch32 mode
	4654e39 plat: rockchip: support bl32/bl33 fixup by platform
	bb80fd3 make.sh: remove 'DEBUG=1' compile option
	1e2e0a8 px30: enable CONFIG_PLAT_WARMBOOT_ADDR_NOT_ALIGN
	3b7e61c rk3308: enable CONFIG_PLAT_WARMBOOT_ADDR_NOT_ALIGN
	9f2cf03 rockchip: common: make warmboot address 64 align optional
	89ade25 rk3308: platform_def.h: decrease MMU xlat table size

Change-Id: I8870bfbc829614e98d07cd2667bb2e1207131596
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-06-06 14:28:48 +08:00
Tang Yun ping
34e508c2c9 rk322x: tee: update optee version to v1.91 
build from optee commit:
	8f9b57e rk322x: ddr: fix lpddr3 bug
update feature:
	8f9b57e rk322x: ddr: fix lpddr3 bug

Change-Id: Icf10a3f71b4cc3f29c400c975b0a52906b0193c4
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-06-05 10:17:32 +08:00
Hisping Lin
79a702f4fa rk322x: tee with ta: update optee version to v1.96 
build from optee commit:
	78b830cb rk322x: ddr: fix lpddr3 bug

update feature:
	78b830cb rk322x: ddr: fix lpddr3 bug
	7b4ec903 plat-rockchip: config: add configs for dual filesystems
	778c7c9f libutee: remove storageID check, let TEE kernel validate instead
	4ed35d6f storage: return TEE_ERROR_ITEM_NOT_FOUND when storage ID is unknown

Change-Id: Ife29b5fda8848b6afc4edc48fe60e677646ff768
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
 2018-06-05 10:04:44 +08:00
chenfen
246b64c589 rk312x: usbplug: support upgrade by LBA. 
from commit: ca6111834 rk312x usbplug support upgrade by LBA.

Change-Id: I6b5a114c92f8ea1c2a6da36366b1d95dbee2036c
Signed-off-by: chenfen <chenfen@rock-chips.com>
 2018-06-01 16:04:24 +08:00
XiaoDong Huang
73d74df00b px30: bl31: update version to v1.12 
Build from ATF commit:
    beb0831 plat: px30: support cluster idle
update feature:
    beb0831 plat: px30: support cluster idle
    4654e39 plat: rockchip: support bl32/bl33 fixup by platform
    1e2e0a8 px30: enable CONFIG_PLAT_WARMBOOT_ADDR_NOT_ALIGN
    9f2cf03 rockchip: common: make warmboot address 64 align optional
    eff4387 plat: px30: dfs: close DDR standby during change DDR frequency
    a933e5a plat: px30: ddr: fix ddr4 tCCD_L set error
    2e3014a plat: px30: dfs: add ddr_update_lowpower
    65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: Iba22bbe055cb3f50f4a43af8048bca4311919424
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-06-01 10:17:33 +08:00
XiaoDong Huang
0905fc413f rk3326: bl31: update version to v1.12 
Build from ATF commit:
    beb0831 plat: px30: support cluster idle
update feature:
    beb0831 plat: px30: support cluster idle
    4654e39 plat: rockchip: support bl32/bl33 fixup by platform
    1e2e0a8 px30: enable CONFIG_PLAT_WARMBOOT_ADDR_NOT_ALIGN
    9f2cf03 rockchip: common: make warmboot address 64 align optional
    eff4387 plat: px30: dfs: close DDR standby during change DDR frequency
    a933e5a plat: px30: ddr: fix ddr4 tCCD_L set error
    2e3014a plat: px30: dfs: add ddr_update_lowpower
    65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: I097411c3230a518542c7a58101a3bdf11d706a4f
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-06-01 10:14:36 +08:00
Dingqiang Lin
ebae16a9c9 rk3308: miniloader: update RK3308MINIALL.ini 
Change-Id: I3ad2a3e0ecd0aef8fef0d40464f043042ff0c10e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
 2018-05-25 11:41:10 +08:00
Dingqiang Lin
06c55f4b7e rk3308: miniloader: fix slc nand flash ecc error 
Change-Id: Ife715ec12386e379f45df2403238d023948fae3e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
 2018-05-25 09:01:51 +08:00
XiaoDong Huang
ad8dbb2854 rk3308: bl31: update version to v1.05 
Build from ATF commit:
    65aa5ce rockchip: fix bugs of disable uart fiq
Update feature:
    65aa5ce rockchip: fix bugs of disable uart fiq

Change-Id: I15db77ac414d8b515647aac107eb40a6fcddce38
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-25 08:50:20 +08:00
Zhihuan He
131792fddc rk3308: ddr: update version to v1.21 
from commit:
	rk3308_ddr_393MHz_v1.21.bin from 4929224 rk3308: DDR Version V1.21 in 393MHz
	rk3308_ddr_451MHz_v1.21.bin from 82e6549 rk3308: DDR Version V1.21 in 451MHz
	rk3308_ddr_589MHz_v1.21.bin from a321411 rk3308: DDR Version V1.21 in 589MHz
change:
	enable ddr standby.

Change-Id: I7d1220e4b5823af1bc47ba9d31f31ddf9fe3dd5b
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-24 16:42:51 +08:00
Shunqian Zheng
4cd5a95ba0 upgrade_tool: update to v1.33 version 
The v1.33 upgrade_tool supports gpt parameter flashing, usage:

 $ sudo ./tools/upgrade_tool di -p ./tools/parameter_gpt.txt

Then it would write gpt table to emmc.

Change-Id: I6c4668d0405c880030cf4dfcc291caa62f23cf14
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
 2018-05-23 11:34:41 +08:00
Shunqian Zheng
943f7d79c5 px3se: add miniloader and trust configs for px3se 
PX3SE uses its own miniloader and the cpu debug port
is uart1. It can share the tee binary with rk3126,
so make a soft link to RKTRUST/RK3126TOS.ini for RKTRUST/PX3SETOS.ini.

px3se_ddr_300MHz_v2.08.bin makes the uart1 as debug port.

Change-Id: Ifdca0e7206d5d0c38504b4f6ac7ddd6674e04f0a
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
 2018-05-23 11:19:08 +08:00
chenfen
ba590a3494 rk3308: miniloader: fix secure boot u-boot verify error. 
from commit d61e573 fix secure boot u-boot verify error.

Change-Id: I1f3b7255f90803d40f9a088acf57baf24581e29f
Signed-off-by: chenfen <chenfen@rock-chips.com>
 2018-05-22 09:09:47 +08:00
CanYang He
2a2ab345a9 rk3399: ddr: update ddr init bin v1.12 
built from ddr init project commit:
	9e6431a Version: DDR Version 1.12 20180518

update feature:
1.fix ddr3 board power up fail because of lpddr4 commit

ddr3 power up fail at trust, and ddr3 board download flow can pass,
can enter system, reboot also pass, only power down and up, and hardware
reset can meet this problem.
the fail log as below:
NOTICE:  BL31: Rockchip release version: v1.1
INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO:    Using opteed sec cpu_context!
INFO:    boot cpu mask: 0
ASSERT: bakery_lock_release <170> : bakery_ticket_number(bakery->lock_data[me])

Change-Id: Ie010c8f6f9c415538703256ea11218851ddd8f18
Signed-off-by: CanYang He <hcy@rock-chips.com>
 2018-05-18 11:35:54 +08:00
Zhang Zhijie
019588263e rk3228h/rk3328: bl32: update version to 1.43 
Build from optee commit in develop branch:
	14d301d DEBUG: add debug info for ctx->mmu assert

Update feature:
	14d301d DEBUG: add debug info for ctx->mmu assert
	18ff43b plat-rockchip: add configure uart port function
	7aa5017 efuse: modify udelay function
	142a58f efuse: mask interrupt before efuse read & write
	efb317c rpmb: separate multi block read
	1ec21f3 boringssl: fix compile error when CFG_TEE_CORE_LOG_LEVEL=0
	cdb14d1 plat-rockchip: refine platform init sequence
	a50148c rk_bch: improve the startup speed

Change-Id: Idb08eac4caf4f4f79cd04b557ed92c0124edf5f2
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
 2018-05-17 10:41:38 +08:00
Joseph Chen
315c28ccc1 rk3368h: bl31: rename bl31 file format from bin to elf 
The file is actually elf

Change-Id: I0169cefe46a645fbcf1fd3aa3ebb522a3e5a56c7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-16 14:42:43 +08:00
Joseph Chen
fd086bd476 rk3399: bl31: remove unused rk3399_bl31_v1.00.bin 
Change-Id: I1f5789ad2036effd067611d58bb39ee4450919c1
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-16 14:42:43 +08:00
Joseph Chen
0c4281c7e2 rk322xh: bl31: rename bl31 file format from bin to elf 
The file is actually elf.

Change-Id: Id88b5abb1ef32674c006f6d13dd0992f59a5ac2c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-16 14:42:43 +08:00
Zhihuan He
d4c5c155ee rk3308: ddr: update version to v1.20 
from commit:
	fdfa64b rk3308: DDR Version V1.20
change:
	adjust auto power down and auto self-refresh for lower
power in VCC_DDR and VDD_CORE.

Change-Id: I17fe5d5621d2db7ea64dfb5848706c49da1c3974
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-11 18:01:19 +08:00
Joseph Chen
a53ca5d291 rk3308: bl31: update version to v1.04 
Build from ATF commit:
	490c474 rk3308: set pwm pin pull none in gpio input mode
Update feature:
	490c474 rk3308: set pwm pin pull none in gpio input mode
	9b5adb5 rk3308: make suspend_mode_handler() suitable with kernel driver
	a14f46a rk3308: save/restore cpu qos when system suspend

Change-Id: I1008a3926e252a7fa99b09ddc59794a116a9321c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-11 14:24:43 +08:00
Joseph Chen
1bd61eb3e4 tools: trust_merger: support option for RSA algorithm and SHA algorithm 
1. RSA option: --rsa [algorithm magic]

  --rsa 0: none RSA
  --rsa 1: RSA 1024
  --rsa 2: RSA 2048
  --rsa 3: RSA 2048 PSS(PKCS1 V2.1, only RK3308/PX30/RK3326 need)

2. SHA option: --sha [algorithm magic]
  --sha 0: none sha
  --sha 1: SHA 160
  --sha 2: rk big endian SHA 256(only rk3368 need)
  --sha 3: little endian SHA 256

Change-Id: I54bc8e1b1e5f4a8aadb6787da1f17ffeb55ff1dd
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-11 14:24:42 +08:00
Zhihuan He
95dad4ad6e rk3308: ddr: update version to v1.19 
There are wrong rk3308_ddr_589MHz_v1.19.bin file before.

from commit:
	4a256e5ccf8d rk3308: DDR Version V1.19

Change-Id: I58d2da2192714d6d9cd93dee4293d062d4efabb4
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-11 10:34:57 +08:00
XiaoDong Huang
66e792fb6f rk3399: bl31: update version to 1.16 
compile with option "SPD=opteed"

Change-Id: I8a2be647caa14dc83d2a4b87b5f2c4480c789eba
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-10 15:03:27 +08:00
XiaoDong Huang
374464e44f rk3399: bl31: update version to 1.15 
Build from ATF commit:
    d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
update feature:
    d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
    c4e7b9a plat: rk3399: suspend: support only one channel
    824db84 rockchip: disable uart fiq when cpu/systerm resume

Change-Id: Ic2f4cd81bea778d1a107c5b1842f5b9f4140d5e2
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-09 19:30:16 +08:00
XiaoDong Huang
2fa94db1e6 px30: bl31: update version to v1.11 
Build from ATF commit:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
    43c09a4 plat: px30: dfs: add support lpddr2

Change-Id: Ia052605e109b284d5908b378737ec7c569d99e55
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-09 16:51:01 +08:00
XiaoDong Huang
f9e141282a rk3326: bl31: update version to v1.11 
Build from ATF commit:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
    43c09a4 plat: px30: dfs: add support lpddr2

Change-Id: I223e629d5baf21998f95f96207d6e93c84288bd7
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-09 16:50:31 +08:00
CanYang He
25046c460f rk3399: ddr: update ddr init bin v1.11 
built from ddr init project commit:
	d6e7216 Version: DDR Version 1.11 20180509

update feature:
1.support 1 cs lpddr4
2.support lpddr4 only one channel
3.remove some lpddr4 log

Change-Id: Iac48d346fb1e86193a82369d024100bd02dba6a5
Signed-off-by: CanYang He <hcy@rock-chips.com>
 2018-05-09 15:28:13 +08:00
Tang Yun ping
eac22434ad rk322x: tee with ta: update optee version to v1.95 
build from optee commit:
	ac72e46 rk322x: ddr: use vop raw status to wait line flag

update feature:
	ac72e46 rk322x: ddr: use vop raw status to wait line flag
	eaebb17 static ta: modify efuse write times
	33168af efuse: modify udelay function
	60b8da4 efuse: mask interrupt before efuse read & write

Change-Id: I7e0f2ba8a597af82be153dd8c29963397e80d559
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-05-08 15:49:20 +08:00
Tang Yun ping
8981622a48 px30: update ddr init bin to v1.07 
print info: print info: DDR Version 1.07 20180323
from commit:
	95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I29c95aadd28cfcb598e5898669ea20c9aaed2874
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-05-08 15:49:20 +08:00
Tang Yun ping
83858282ec rk3326: update ddr init bin to v1.07 
print info: print info: DDR Version 1.07 20180423
from commit:
	95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I7eb677af124cdc8121301ed468eeebb5a76f9a01
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-05-08 15:49:20 +08:00
Zhihuan He
9d4ed4734c rk3308: ddr: update version to v1.19 
from commit:
	4a256e5ccf8d rk3308: DDR Version V1.19
change:
	1.check boot memory device.If loader device turn to maskrom
device,download is normal.
	2.adjust dq10,dq11,dq14,dq15 de-skew for better dqs1 eye training.
	3.reduce pll vco
	4.change qos prority,reduce cpu QOS prority,improve
some QOS prority.
	5.Do not clear grf_os_reg0 when boot mode is BOOT_BROM_DOWNLOAD

Change-Id: Ie7cb666c634ce41ea558acbd71096f0811fe3444
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-08 11:39:57 +08:00
Joseph Chen
2ef2d2b6f8 rk3308: bl31: update version to v1.03 
Build from ATF commit:
	4b75948 plat: px30: support soc_bus sip.
Update feature:
	1. disable uart fiq when cpu/systerm resume;
	2. enable non-secure world access Peri QOS;

Change-Id: Id73a4356c0058e265679a0130b6b54580e7e0462
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-08 11:28:53 +08:00
Joseph Chen
3c3f17d926 rk3288: tee: update version to v1.32 
build from optee:
	c72e46 rk322x: ddr: use vop raw status to wait line flag
update features:
	apply arm errata 825619 and FOOBAR

Change-Id: Icfb7fd16803dbabaae70b50be67636afa2bf02ab
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-08 09:18:44 +08:00
XiaoDong Huang
853121ce1a px30: bl31: update version to v1.10 
Build from ATF commit:
    4b75948 plat: px30: support soc_bus sip.
update feature:
    4b75948 plat: px30: support soc_bus sip.
    824db84 rockchip: disable uart fiq when cpu/systerm resume
    1d4b214 Revert "plat: px30: add cluster idle support

Change-Id: Ied43a2fd12ed35327f9220a37f9e18c388720da3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-04 15:47:52 +08:00
XiaoDong Huang
0015f32e8b rk3326: bl31: update version to v1.10 
Build from ATF commit:
    4b75948 plat: px30: support soc_bus sip.
update feature:
    4b75948 plat: px30: support soc_bus sip.
    824db84 rockchip: disable uart fiq when cpu/systerm resume
    1d4b214 Revert "plat: px30: add cluster idle support

Change-Id: I1d96ec07071bd1808717e5ef13577a13abd554ff
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-04 15:44:36 +08:00
Tang Yun ping
1848e28e7b rk322xh/rk3328: ddr: update ddr init code to v1.13 
print info: DDR Version 1.13 20180428
from commit:
	c25a53d rk322xh: ddr: update init code to v1.13

Change-Id: Iace65e548d00b9d50abf41aac9a29d2e5bf7e1bb
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-28 18:08:29 +08:00
Tang Yun ping
283f89886d rk3128: update ddr init bin to v2.08 
1. Init timer5 as arch timer for ARM.
2. Improve DDR stability.
print info: DDR Version 2.08 20180426
from commit:
	30b95fd rk3128: ddr: init code update to v2.08

Change-Id: I2f57b758a5a3e3b631d82a3ee92b038dcf5c179c
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-28 18:08:24 +08:00
XiaoDong Huang
70f7823e58 rk3399: bl31: update version to 1.14 
Build from ATF commit:
    a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
update feature:
    1. a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
    2. bcbc322 plat: rk3399: suspend: fix lpddr4 after init frequency changed
    3. 69d9b56 bl31: execute bl32_init() dynamically

Change-Id: I1783740344a7202978a2d8c699fcddbdc3eaefae
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-28 17:45:33 +08:00
XiaoDong Huang
6fbc1c3200 px30: bl31: update version to v1.09 
Build from ATF commit:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register

Change-Id: I16fa2cd53780d5c0b80c79a02dcaab4d73983554
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-28 15:25:42 +08:00
XiaoDong Huang
f822d440df rk3326: bl31: update version to v1.09 
Build from ATF commit:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register

Change-Id: Id3ee66c580af6d23de097323828ab93b9f1ec74c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-28 15:12:17 +08:00
Tang Yun ping
88ccb39695 rk322x: update ddr init bin to v1.07 
print info: DDR Version V1.07 20180426
from commit:
	1ab07b4 rk322x: ddr update to v1.07

Change-Id: I0ecb4c3ba23a6034196f3d1a4c6acc5fe95e6876
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-27 16:44:18 +08:00
Zhang Zhijie
c274cbb9bc rk3308: bl32: add initial version v1.00 
Bl32 is default disabled for rk3308, build from:
	b9d3a88 plat-rockchip: add rk3308 support

Change-Id: I7f983f5a4b7548f7456f9a9cb5604d6d68c14179
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
 2018-04-25 11:17:17 +08:00
shengfei Xu
67b7651dba rk3399: bl31: update version to 1.13 
Build from ATF commit:
    93a86df rockchip: Add RK3308 support
update feature:
    1) 5ab1c72 rockchip: rockchip_sip_svc: add used SIP numbers definition
    2) 92e94aa plat: rk3399: suspend: 400 to 800 with pd_center off pass version
    3) 7bcd2a3 plat: rk3399: ddr: fix global reset fail when vdd_gpu power off
    4) c81b210 plat: rk3399: ddr: fix ddrconfig shift error
    5) a0e119f plat: rk3399: ddr: fix ddrconfig save error

Change-Id: If4c9a7434e0d9ef63e2a6f271b4ccc937771dc2d
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
 2018-04-25 09:53:44 +08:00
XiaoDong Huang
a01f73225e px30: bl31: update version to v1.08 
Build from ATF commit:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
    bfeba24 plat: px30: use CPU for ddr scale frequency
    25a0f1b plat: px30: add fiq func for stimer0.
    ac2470d plat: px30: disable resetting output pin.
    69d9b56 bl31: execute bl32_init() dynamically

Change-Id: Iaaf6de5ff84f688fc4e95fdeb38cdf1e70eabb4d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-25 09:43:23 +08:00
XiaoDong Huang
f3d3299f9d rk3326: bl31: update version to v1.08 
Build from ATF commit:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
    bfeba24 plat: px30: use CPU for ddr scale frequency
    25a0f1b plat: px30: add fiq func for stimer0.
    ac2470d plat: px30: disable resetting output pin.
    69d9b56 bl31: execute bl32_init() dynamically

Change-Id: Icc3509a9f71f55a660e66198f4fe77a499a25d46
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-25 09:43:23 +08:00
Tang Yun ping
32077bedb3 rk3326: update ddr init bin to v1.06 
print info: print info: DDR Version 1.06 20180323
from commit:
    32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: I3b2ff1490e58090cc73997859879ac78f6d2e840
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-24 15:51:17 +08:00
Tang Yun ping
d4f8b706bd px30: update ddr init bin to v1.06 
print info: print info: DDR Version 1.06 20180323
from commit:
	32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: Ied9760d8e1474217f58b3fc1fa4170bbce865fc8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-24 15:51:17 +08:00
Zhang Zhijie
85cb8de572 rk322x: tee with ta: update optee version to v1.94 
build from optee commit:
	e18ec91 workaround: rockchip: invalidate dcache before enable MMU

update feature:
	e18ec91 workaround: rockchip: invalidate dcache before enable MMU
	be33a34 rk3228: soc_monitor: make panic more powerful when soc check failed
	e37b0f6 rk3228: soc_monitor: print some marks when panic
	1ffdb85 rk322x: ddr: using aclk_vop to judge if vop is working
	1c0d54b rpmb: add rpmb_test_key back

Change-Id: Ib3a5a72716c4fb371414f706fb5c45054c11e624
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
 2018-04-24 15:15:22 +08:00
XiaoDong Huang
9c5baafbb8 rk3308: bl31: update version to v1.02 
Build from ATF commit:
    69d9b56 bl31: execute bl32_init() dynamically

Update features:
    1. 69d9b56 bl31: execute bl32_init() dynamically
    2. 35e0de4 plat: rk3308: dfs: add ddr_get_rate implement
    3. e46f07e plat: rk3308: add optimise

Change-Id: I99ed333c38a8c1038120ab311602f3eeb2599995
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-24 08:59:45 +08:00