Build from optee commit in develop-next branch:
85f8d2dd static ta: add support write data from user ta
Update feature:
fc24de3f Revert "plat-rockchip: drop align_malloc.c and align_malloc.h"
e65714d1 core: lib: libtomcrypt: mpi_desc: add shift_right function
4a49d838 core: ltc: rsa: fix bug on add algorithms below
Change-Id: I69c732cb912aedf2e2e1c9425271201a58034583
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
85f8d2dd static ta: add support write data from user ta
Update feature:
fc24de3f Revert "plat-rockchip: drop align_malloc.c and align_malloc.h"
e65714d1 core: lib: libtomcrypt: mpi_desc: add shift_right function
4a49d838 core: ltc: rsa: fix bug on add algorithms below
Change-Id: I36b4074544adbbcffc4cbb9400716b6e0a73bcd8
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
85f8d2dd static ta: add support write data from user ta
Update feature:
fc24de3f Revert "plat-rockchip: drop align_malloc.c and align_malloc.h"
e65714d1 core: lib: libtomcrypt: mpi_desc: add shift_right function
4a49d838 core: ltc: rsa: fix bug on add algorithms below
Change-Id: I8d2d44f92a9b28673233ca60b567eb76f64df52e
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
3b0152ca static ta: modify length judgement in uboot storedata
Update feature:
f73ba4e3 static ta: add support write data from user ta
9e5e3953 rk3228H: change SRAM secure region size
804069a6 rk3228H: fix SRAM address config error
Change-Id: Ic508268618faab4b931f80ab6da812f132f65325
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
3b0152ca static ta: modify length judgement in uboot storedata
Update feature:
f73ba4e3 static ta: add support write data from user ta
9e5e3953 rk3228H: change SRAM secure region size
804069a6 rk3228H: fix SRAM address config error
Change-Id: Ia07f54b33a2fc07080bff7fad6d0be5e601a9162
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
3b0152ca static ta: modify length judgement in uboot storedata
Update feature:
f73ba4e3 static ta: add support write data from user ta
9e5e3953 rk3228H: change SRAM secure region size
804069a6 rk3228H: fix SRAM address config error
Change-Id: I79fd7a86c71b997582dcb68dd2a8744b586a9878
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
3b0152ca static ta: modify length judgement in uboot storedata
Update feature:
f73ba4e3 static ta: add support write data from user ta
9e5e3953 rk3228H: change SRAM secure region size
804069a6 rk3228H: fix SRAM address config error
Change-Id: I6caae5b53e4827352a0d37687ba79ef8ab36dae4
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
6a30fc35 static ta: modify length judgement in uboot storedata
update feature:
05fb3282 static ta: add support write data from user ta
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
ad25cd57 static ta: return error if tee fs read data len is zero
Change-Id: I863db5b36753ea5262257a55f5780962b46be573
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
6a30fc35 static ta: modify length judgement in uboot storedata
update feature:
05fb3282 static ta: add support write data from user ta
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
ad25cd57 static ta: return error if tee fs read data len is zero
Change-Id: I62bd912f7438880a312397654231b828182e0d0d
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
6a30fc35 static ta: modify length judgement in uboot storedata
update feature:
05fb3282 static ta: add support write data from user ta
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
ad25cd57 static ta: return error if tee fs read data len is zero
Change-Id: I9683c8e5050574904fdce4c5334e89a46c319c70
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
6a30fc35 static ta: modify length judgement in uboot storedata
update feature:
05fb3282 static ta: add support write data from user ta
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
ad25cd57 static ta: return error if tee fs read data len is zero
Change-Id: Ia7f3887cce67de1bba5e2ba1cc431ae4d3aee5cd
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
from commit: 7f7d480a47de7a3103fb091c54c46baa61b31e8f
Change-Id: I85947a30b6833026ac44981d3789c44ff53ea3a5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
update feature:
ad25cd57 static ta: return error if tee fs read data len is zero
ef321390 plat: rk3288: suspend: support default suspend mode
5e3b27cf rk312x: ddr freq: fix bug about 2T
Change-Id: I8bd74e6421c71a0ecb48dbd5e9ca4eaa9ac5ff8e
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
update feature:
ad25cd57 static ta: return error if tee fs read data len is zero
ef321390 plat: rk3288: suspend: support default suspend mode
5e3b27cf rk312x: ddr freq: fix bug about 2T
Change-Id: I7061f7c476d2b3988022a524c93585b7edb35737
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit in develop-rk3228 branch:
d098c6d2 rk322x/rk3128x/rk3288: increase shm size from 1MB to 2MB
update feature:
ad25cd57 static ta: return error if tee fs read data len is zero
ef321390 plat: rk3288: suspend: support default suspend mode
5e3b27cf rk312x: ddr freq: fix bug about 2T
Change-Id: I979be93eb1597f0f1f472f7de76aa1c13249f5a9
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
1. If setup no value, it will not update ddr bin's info.
example: if "baudrate=", the baudrate will keep the
same with ddr bin's config.
2. add ddr_2t info modify
Change-Id: I180e729f5d45d2dbfa16b98041a9523c47c5c7b7
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
build from optee commit in develop-rk3228 branch:
ad25cd57 static ta: return error if tee fs read data len is zero
update feature:
ad25cd57 static ta: return error if tee fs read data len is zero
ef321390 plat: rk3288: suspend: support default suspend mode
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I61251f8a8ccaccbe44cd1092cc71fcc4457a5ef0
Forgot to update it but it actually makes no effect since
trust_merger parses the reall address from elf header.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4b4e87c9a684b9f02e30b7ec84859e6493a09b13
build from commit:
a23125: src: platform: rk3036: support sfc
update feature:
support SFC SPI Nor
Change-Id: I07623819569cb7a9ea9f1883309647dfe5bc0e20
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
c72d34 Pass efuse program flag to uboot.
update feature:
Pass efuse program flag to uboot.
Signed-off-by: Chen Fen <chenfen@rock-chips.com>
Change-Id: I412520ee6a1cabe078732dfeecebb9fda642836e
build from:
c72d34 Pass efuse program flag to uboot.
update feature:
Pass efuse program flag to uboot.
Signed-off-by: Chen Fen <chenfen@rock-chips.com>
Change-Id: I43e41317792d809c9d4786ee0b92b1f2e4192a65
Build from ATF commit:
17814c8b1 plat: rk1808: dfs: remove configure noc timing about aging
update feature:
17814c8b1 plat: rk1808: dfs: remove configure noc timing about aging
50f2e2e33 plat: rockchip: fiq_dfs: add isb and dsb after tlbialle3
7018b4108 rockchip: add a script to commit elf to rkbin
19ab7dfbb plat: rk1808: set all region as secure to all master
31ff1d082 plat: rockchip: set "plat_uart_base=0" if uart disable
99ca711ac plat: rockchip: uart: wait no busy before restore
37dfd1be7 rockchip: support TOS parameter parse
655d6733e rockchip: gicv3: fix some SGI operation interface
Change-Id: Iacaed9e520fc1541bc18f4de017d0b344680dea1
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
17814c8b1 plat: rk1808: dfs: remove configure noc timing about aging
update feature:
17814c8b1 plat: rk1808: dfs: remove configure noc timing about aging
50f2e2e33 plat: rockchip: fiq_dfs: add isb and dsb after tlbialle3
7018b4108 rockchip: add a script to commit elf to rkbin
19ab7dfbb plat: rk1808: set all region as secure to all master
31ff1d082 plat: rockchip: set "plat_uart_base=0" if uart disable
99ca711ac plat: rockchip: uart: wait no busy before restore
37dfd1be7 rockchip: support TOS parameter parse
655d6733e rockchip: gicv3: fix some SGI operation interface
Change-Id: I6799f35488b90ce9d108b038656ed92252aae5c1
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
If setup value is 0, it will not update ddr bin's info.
Change-Id: I3b062f7662d6a345597d974340489184f263f403
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
build from:
5b44f28 dram init: rk1808: update ddr bin version to v1.04
update feature:
1. update cpu and npu's priorty to 1, vop's priority to 3
and ohter master's priority to 2.
2. agingx0 set to 0x4, aging0 set to 0x33, aging1,2 set to 0xff.
Change-Id: I98e789eece9efcd913c450cf773985139fc8d9e1
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
build from:
5b44f28 dram init: rk1808: update ddr bin version to v1.04
update feature:
1. update cpu and npu's priorty to 1, vop's priority to 3
and ohter master's priority to 2.
2. agingx0 set to 0x4, aging0 set to 0x33, aging1,2 set to 0xff.
Change-Id: I0a53ccfeac377cb63fbfeb3f2d7eb7718103ef73
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Build from ATF commit:
d25b046 plat: rk3368: suspend: no need to save/restore mcu data
update feature:
d25b046 plat: rk3368: suspend: no need to save/restore mcu data
d27bda2 plat: rk3368: change bl31_base to 0x40000
17dda82 plat: rk3368: suspend: disable/restore watchdog
73ddb15 plat: rockchip: common: update LPDDR4 spec timing
868b602 plat: rockchip: common: update dram spec ODT timing
50f2e2e plat: rockchip: fiq_dfs: add isb and dsb after tlbialle3
7018b41 rockchip: add a script to commit elf to rkbin
19ab7df plat: rk1808: set all region as secure to all master
31ff1d0 plat: rockchip: set "plat_uart_base=0" if uart disable
99ca711 plat: rockchip: uart: wait no busy before restore
Change-Id: I6e302985ad907d570ef6743fd52c829c4a31b3a0
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
build from optee commit in develop-rk3228 branch:
cdfc713f thread: support configurable 2T mode
Change-Id: I482fea276bc79a03fc247989ccb896ca380ddc0a
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
