Mirrors/rkbin
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
481 Commits 1 Branch 0 Tags
8db84ecba594dbba756fda5fbd1d57f0f087bdd7
Commit Graph

481 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Zhang Zhijie
8db84ecba5 rk3228h/rk3328: bl32: update version to 1.43 
Build from optee commit in develop branch:
	14d301d DEBUG: add debug info for ctx->mmu assert

Update feature:
	14d301d DEBUG: add debug info for ctx->mmu assert
	18ff43b plat-rockchip: add configure uart port function
	7aa5017 efuse: modify udelay function
	142a58f efuse: mask interrupt before efuse read & write
	efb317c rpmb: separate multi block read
	1ec21f3 boringssl: fix compile error when CFG_TEE_CORE_LOG_LEVEL=0
	cdb14d1 plat-rockchip: refine platform init sequence
	a50148c rk_bch: improve the startup speed

Change-Id: Idb08eac4caf4f4f79cd04b557ed92c0124edf5f2
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
 2018-05-17 10:41:38 +08:00
Joseph Chen
172fdf72cf rk3368h: bl31: rename bl31 file format from bin to elf 
The file is actually elf

Change-Id: I0169cefe46a645fbcf1fd3aa3ebb522a3e5a56c7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-16 14:42:43 +08:00
Joseph Chen
7f073513fe rk3399: bl31: remove unused rk3399_bl31_v1.00.bin 
Change-Id: I1f5789ad2036effd067611d58bb39ee4450919c1
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-16 14:42:43 +08:00
Joseph Chen
29fbc29926 rk322xh: bl31: rename bl31 file format from bin to elf 
The file is actually elf.

Change-Id: Id88b5abb1ef32674c006f6d13dd0992f59a5ac2c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-16 14:42:43 +08:00
Zhihuan He
a2cb88ad00 rk3308: ddr: update version to v1.20 
from commit:
	fdfa64b rk3308: DDR Version V1.20
change:
	adjust auto power down and auto self-refresh for lower
power in VCC_DDR and VDD_CORE.

Change-Id: I17fe5d5621d2db7ea64dfb5848706c49da1c3974
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-11 18:01:19 +08:00
Joseph Chen
84428ded25 rk3308: bl31: update version to v1.04 
Build from ATF commit:
	490c474 rk3308: set pwm pin pull none in gpio input mode
Update feature:
	490c474 rk3308: set pwm pin pull none in gpio input mode
	9b5adb5 rk3308: make suspend_mode_handler() suitable with kernel driver
	a14f46a rk3308: save/restore cpu qos when system suspend

Change-Id: I1008a3926e252a7fa99b09ddc59794a116a9321c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-11 14:24:43 +08:00
Joseph Chen
3b0f13927b tools: trust_merger: support option for RSA algorithm and SHA algorithm 
1. RSA option: --rsa [algorithm magic]

  --rsa 0: none RSA
  --rsa 1: RSA 1024
  --rsa 2: RSA 2048
  --rsa 3: RSA 2048 PSS(PKCS1 V2.1, only RK3308/PX30/RK3326 need)

2. SHA option: --sha [algorithm magic]
  --sha 0: none sha
  --sha 1: SHA 160
  --sha 2: rk big endian SHA 256(only rk3368 need)
  --sha 3: little endian SHA 256

Change-Id: I54bc8e1b1e5f4a8aadb6787da1f17ffeb55ff1dd
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-11 14:24:42 +08:00
Zhihuan He
39ae712ff3 rk3308: ddr: update version to v1.19 
There are wrong rk3308_ddr_589MHz_v1.19.bin file before.

from commit:
	4a256e5ccf8d rk3308: DDR Version V1.19

Change-Id: I58d2da2192714d6d9cd93dee4293d062d4efabb4
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-11 10:34:57 +08:00
XiaoDong Huang
cc01795818 rk3399: bl31: update version to 1.16 
compile with option "SPD=opteed"

Change-Id: I8a2be647caa14dc83d2a4b87b5f2c4480c789eba
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-10 15:03:27 +08:00
XiaoDong Huang
dd33e193ee rk3399: bl31: update version to 1.15 
Build from ATF commit:
    d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
update feature:
    d98d16e plat: rk3399: suspend: remove ddr debug log in suspend and dfs
    c4e7b9a plat: rk3399: suspend: support only one channel
    824db84 rockchip: disable uart fiq when cpu/systerm resume

Change-Id: Ic2f4cd81bea778d1a107c5b1842f5b9f4140d5e2
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-09 19:30:16 +08:00
XiaoDong Huang
ae7f7f0a5e px30: bl31: update version to v1.11 
Build from ATF commit:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
    43c09a4 plat: px30: dfs: add support lpddr2

Change-Id: Ia052605e109b284d5908b378737ec7c569d99e55
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-09 16:51:01 +08:00
XiaoDong Huang
705e6fd63f rk3326: bl31: update version to v1.11 
Build from ATF commit:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
update feature:
    5f31f71 plat: px30: disable resetting output pin even reboot cmd.
    43c09a4 plat: px30: dfs: add support lpddr2

Change-Id: I223e629d5baf21998f95f96207d6e93c84288bd7
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-09 16:50:31 +08:00
CanYang He
f85977d9da rk3399: ddr: update ddr init bin v1.11 
built from ddr init project commit:
	d6e7216 Version: DDR Version 1.11 20180509

update feature:
1.support 1 cs lpddr4
2.support lpddr4 only one channel
3.remove some lpddr4 log

Change-Id: Iac48d346fb1e86193a82369d024100bd02dba6a5
Signed-off-by: CanYang He <hcy@rock-chips.com>
 2018-05-09 15:28:13 +08:00
Tang Yun ping
1e49616bde rk322x: tee with ta: update optee version to v1.95 
build from optee commit:
	ac72e46 rk322x: ddr: use vop raw status to wait line flag

update feature:
	ac72e46 rk322x: ddr: use vop raw status to wait line flag
	eaebb17 static ta: modify efuse write times
	33168af efuse: modify udelay function
	60b8da4 efuse: mask interrupt before efuse read & write

Change-Id: I7e0f2ba8a597af82be153dd8c29963397e80d559
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-05-08 15:49:20 +08:00
Tang Yun ping
fb53336219 px30: update ddr init bin to v1.07 
print info: print info: DDR Version 1.07 20180323
from commit:
	95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I29c95aadd28cfcb598e5898669ea20c9aaed2874
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-05-08 15:49:20 +08:00
Tang Yun ping
2b64f07b46 rk3326: update ddr init bin to v1.07 
print info: print info: DDR Version 1.07 20180423
from commit:
	95d3ef5 rk3326: ddr: init code update to v1.07

Change-Id: I7eb677af124cdc8121301ed468eeebb5a76f9a01
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-05-08 15:49:20 +08:00
Zhihuan He
426d833033 rk3308: ddr: update version to v1.19 
from commit:
	4a256e5ccf8d rk3308: DDR Version V1.19
change:
	1.check boot memory device.If loader device turn to maskrom
device,download is normal.
	2.adjust dq10,dq11,dq14,dq15 de-skew for better dqs1 eye training.
	3.reduce pll vco
	4.change qos prority,reduce cpu QOS prority,improve
some QOS prority.
	5.Do not clear grf_os_reg0 when boot mode is BOOT_BROM_DOWNLOAD

Change-Id: Ie7cb666c634ce41ea558acbd71096f0811fe3444
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-05-08 11:39:57 +08:00
Joseph Chen
f0748d72f2 rk3308: bl31: update version to v1.03 
Build from ATF commit:
	4b75948 plat: px30: support soc_bus sip.
Update feature:
	1. disable uart fiq when cpu/systerm resume;
	2. enable non-secure world access Peri QOS;

Change-Id: Id73a4356c0058e265679a0130b6b54580e7e0462
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-08 11:28:53 +08:00
Joseph Chen
163972acb9 rk3288: tee: update version to v1.32 
build from optee:
	c72e46 rk322x: ddr: use vop raw status to wait line flag
update features:
	apply arm errata 825619 and FOOBAR

Change-Id: Icfb7fd16803dbabaae70b50be67636afa2bf02ab
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-05-08 09:18:44 +08:00
XiaoDong Huang
1ec4b95e66 px30: bl31: update version to v1.10 
Build from ATF commit:
    4b75948 plat: px30: support soc_bus sip.
update feature:
    4b75948 plat: px30: support soc_bus sip.
    824db84 rockchip: disable uart fiq when cpu/systerm resume
    1d4b214 Revert "plat: px30: add cluster idle support

Change-Id: Ied43a2fd12ed35327f9220a37f9e18c388720da3
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-04 15:47:52 +08:00
XiaoDong Huang
17a98a52a6 rk3326: bl31: update version to v1.10 
Build from ATF commit:
    4b75948 plat: px30: support soc_bus sip.
update feature:
    4b75948 plat: px30: support soc_bus sip.
    824db84 rockchip: disable uart fiq when cpu/systerm resume
    1d4b214 Revert "plat: px30: add cluster idle support

Change-Id: I1d96ec07071bd1808717e5ef13577a13abd554ff
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-05-04 15:44:36 +08:00
Tang Yun ping
8b75d2c4b3 rk322xh/rk3328: ddr: update ddr init code to v1.13 
print info: DDR Version 1.13 20180428
from commit:
	c25a53d rk322xh: ddr: update init code to v1.13

Change-Id: Iace65e548d00b9d50abf41aac9a29d2e5bf7e1bb
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-28 18:08:29 +08:00
Tang Yun ping
f9b8ce4851 rk3128: update ddr init bin to v2.08 
1. Init timer5 as arch timer for ARM.
2. Improve DDR stability.
print info: DDR Version 2.08 20180426
from commit:
	30b95fd rk3128: ddr: init code update to v2.08

Change-Id: I2f57b758a5a3e3b631d82a3ee92b038dcf5c179c
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-28 18:08:24 +08:00
XiaoDong Huang
e9d68a18b5 rk3399: bl31: update version to 1.14 
Build from ATF commit:
    a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
update feature:
    1. a11dd97 plat: rk3399: suspend: fix lpddr4 1 cs die resume fail
    2. bcbc322 plat: rk3399: suspend: fix lpddr4 after init frequency changed
    3. 69d9b56 bl31: execute bl32_init() dynamically

Change-Id: I1783740344a7202978a2d8c699fcddbdc3eaefae
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-28 17:45:33 +08:00
XiaoDong Huang
c2c6c5fa1d px30: bl31: update version to v1.09 
Build from ATF commit:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register

Change-Id: I16fa2cd53780d5c0b80c79a02dcaab4d73983554
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-28 15:25:42 +08:00
XiaoDong Huang
6498fd4508 rk3326: bl31: update version to v1.09 
Build from ATF commit:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register
update feature:
    4f8f7c9 plat: px30: suspend: save/restore i2c_con register

Change-Id: Id3ee66c580af6d23de097323828ab93b9f1ec74c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-28 15:12:17 +08:00
Tang Yun ping
364df6ae7c rk322x: update ddr init bin to v1.07 
print info: DDR Version V1.07 20180426
from commit:
	1ab07b4 rk322x: ddr update to v1.07

Change-Id: I0ecb4c3ba23a6034196f3d1a4c6acc5fe95e6876
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-27 16:44:18 +08:00
Zhang Zhijie
8452b06a32 rk3308: bl32: add initial version v1.00 
Bl32 is default disabled for rk3308, build from:
	b9d3a88 plat-rockchip: add rk3308 support

Change-Id: I7f983f5a4b7548f7456f9a9cb5604d6d68c14179
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
 2018-04-25 11:17:17 +08:00
shengfei Xu
253142bece rk3399: bl31: update version to 1.13 
Build from ATF commit:
    93a86df rockchip: Add RK3308 support
update feature:
    1) 5ab1c72 rockchip: rockchip_sip_svc: add used SIP numbers definition
    2) 92e94aa plat: rk3399: suspend: 400 to 800 with pd_center off pass version
    3) 7bcd2a3 plat: rk3399: ddr: fix global reset fail when vdd_gpu power off
    4) c81b210 plat: rk3399: ddr: fix ddrconfig shift error
    5) a0e119f plat: rk3399: ddr: fix ddrconfig save error

Change-Id: If4c9a7434e0d9ef63e2a6f271b4ccc937771dc2d
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
 2018-04-25 09:53:44 +08:00
XiaoDong Huang
7ff077f8bd px30: bl31: update version to v1.08 
Build from ATF commit:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
    bfeba24 plat: px30: use CPU for ddr scale frequency
    25a0f1b plat: px30: add fiq func for stimer0.
    ac2470d plat: px30: disable resetting output pin.
    69d9b56 bl31: execute bl32_init() dynamically

Change-Id: Iaaf6de5ff84f688fc4e95fdeb38cdf1e70eabb4d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-25 09:43:23 +08:00
XiaoDong Huang
51d498dd1a rk3326: bl31: update version to v1.08 
Build from ATF commit:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
update feature:
    bf05006 plat: px30: suspend: fix judgement err of gic resume
    bfeba24 plat: px30: use CPU for ddr scale frequency
    25a0f1b plat: px30: add fiq func for stimer0.
    ac2470d plat: px30: disable resetting output pin.
    69d9b56 bl31: execute bl32_init() dynamically

Change-Id: Icc3509a9f71f55a660e66198f4fe77a499a25d46
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-25 09:43:23 +08:00
Tang Yun ping
3f9c49a89b rk3326: update ddr init bin to v1.06 
print info: print info: DDR Version 1.06 20180323
from commit:
    32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: I3b2ff1490e58090cc73997859879ac78f6d2e840
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-24 15:51:17 +08:00
Tang Yun ping
983ce170e3 px30: update ddr init bin to v1.06 
print info: print info: DDR Version 1.06 20180323
from commit:
	32fd6bc rk3326: ddr: init code update to v1.06

Change-Id: Ied9760d8e1474217f58b3fc1fa4170bbce865fc8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
 2018-04-24 15:51:17 +08:00
Zhang Zhijie
fa8036ef15 rk322x: tee with ta: update optee version to v1.94 
build from optee commit:
	e18ec91 workaround: rockchip: invalidate dcache before enable MMU

update feature:
	e18ec91 workaround: rockchip: invalidate dcache before enable MMU
	be33a34 rk3228: soc_monitor: make panic more powerful when soc check failed
	e37b0f6 rk3228: soc_monitor: print some marks when panic
	1ffdb85 rk322x: ddr: using aclk_vop to judge if vop is working
	1c0d54b rpmb: add rpmb_test_key back

Change-Id: Ib3a5a72716c4fb371414f706fb5c45054c11e624
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
 2018-04-24 15:15:22 +08:00
XiaoDong Huang
e52bc4972c rk3308: bl31: update version to v1.02 
Build from ATF commit:
    69d9b56 bl31: execute bl32_init() dynamically

Update features:
    1. 69d9b56 bl31: execute bl32_init() dynamically
    2. 35e0de4 plat: rk3308: dfs: add ddr_get_rate implement
    3. e46f07e plat: rk3308: add optimise

Change-Id: I99ed333c38a8c1038120ab311602f3eeb2599995
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
 2018-04-24 08:59:45 +08:00
Liang Chen
64183c3868 rk3128x: add ini files and bin files 
Change-Id: I5fd2af4b3240126b0ade346ccffc81d8ee2fb80d
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2018-04-16 11:21:27 +08:00
Joseph Chen
81db5cb650 rk3288: tee: update version to v1.31 
build from commit:
	e18ec91 workaround: rockchip: invalidate dcache before enable MMU

update features:
	1. fix rk3288w recognize wrongly issus;
	2. fix rk3288 spinlock occupied issue when start up;

Change-Id: If9cc50c1bbfa104791e02f8f67277dbcfbac12ff
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-04-16 11:10:25 +08:00
Zhihuan He
fe30ebb9b8 rk3308: ddr: add initial version v1.11 
from commit :
        7b62dfc rk3308: DDR Version V1.11
add
	1.set vpll0 in 1179.648MHz,vpll1 in 903.168MHz
	2.ddr in vpll0,set 589MHz
	3.adjusted deskew for aligning DQS and CK
	4.delete clk 50% duty ratio setting in cru
	5.set APLL,DPLL,VPLL0,VPLL1 without level shift
	6.set pll vco high,but lower 3.2GHz,for minimum jitter.
	7.add ddr scramble,include enable pmu pvtm.
	8.updata ddr config grf_os_reg2,grf_os_reg3 to v1.08.

Change-Id: Ia459f53d7d9623f3af7e0de1edc2f99735d57c80
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
 2018-04-16 10:08:25 +08:00
Joseph Chen
7d3d75f77c rk3308: bl31: add initial version v1.01 
This is a temporary version, build from: c288f26

update features:
	1. Support pwm regulator suspend voltage adjust;
	2. Don't update voice VPLL.

Change-Id: I2620a245051a9cbd22ef81bdf9d19cf2ea5b4f28
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-04-13 11:33:28 +08:00
Yifeng Zhao
85a367ae81 rk3326: zftl: improve the processing mechanism of nand flash read and write 
from loader commit 0d94125e9: zftl: improve the processing mechanism of nand flash read and write

Change-Id: I13c37f1a56f288f13bf17c5ed1992d363a0e6080
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
 2018-04-13 10:51:10 +08:00
CanYang He
b25daf4b30 rk3399: ddr: update ddr init bin v1.10 
built from ddr init project commit:
	6ac5927 Version: DDR Version 1.10 20180410

update feature:
1.the init code change lpddr4 frequency from 50MHz to 400MHz,
  and final to 800MHz, this version is a good support for
  system suspend resume.
2.fix global reset fail when vdd_gpu power off

Change-Id: I490d26f243540d60bd6af2bfda3bddebf4218d1a
Signed-off-by: CanYang He <hcy@rock-chips.com>
 2018-04-13 09:11:11 +08:00
chenfen
0834b0cadf rk3288: usbplug: support upgrade by LBA. 
from commit: ca6111834 rk3288 usbplug support upgrade by LBA.

Change-Id: I5b3bccfdcd58b92bfc9016deee6d4c6e23a8bde3
Signed-off-by: chenfen <chenfen@rock-chips.com>
 2018-04-11 10:42:36 +08:00
chenfen
c7f2a1b69d PX30: miniloader: update when chip_id is null,cann't use PX30 loader upgrade. 
from commit:  0d94125e9 update when chip_id is null,cann't use PX30 loader upgrade.

Change-Id: Ic696d2c76685545d49b4fc8a786b2fd29606f5a6
Signed-off-by: chenfen <chenfen@rock-chips.com>
 2018-04-10 14:59:06 +08:00
chenfen
2a2c3091ab rk3326: miniloader: update when chip_id is null,use rk3326 loader upgrade. 
from commit:  0d94125e9 update when chip_id is null,use rk3336 loader upgrade.

Change-Id: I3fd593beaaf78a83b073797abc8f5f657517ce2a
Signed-off-by: chenfen <chenfen@rock-chips.com>
 2018-04-10 14:52:54 +08:00
chenfen
c1e12ea44a rk3399: usbplug: support upgrade by LBA. 
from commit: ca6111834 rk3399 usbplug support upgrade by LBA.

Change-Id: Ib4f979f3e60bbd335fc394cac3544b8cbb669d2c
Signed-off-by: chenfen <chenfen@rock-chips.com>
 2018-04-09 09:08:43 +08:00
Kever Yang
7bf2ecc8d7 Merge branch 'rkbin' into rkbin_master 2018-04-08 15:52:11 +08:00
Joseph Chen
b0eabb2661 rk3326: bl31: update version to v1.07 
Build from ATF commit:
	6166a3 plat: px30: config soc reset.
update feature:
	b6166a3 plat: px30: config soc reset.
	0935bda plat: px30: dram: update dcf code file to V1.01

Change-Id: Icebc872c0febd084aff82294aaf5f311a10f409d
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-04-04 17:33:10 +08:00
Joseph Chen
514d8d9a2b px30: bl31: update version to v1.07 
Build from ATF commit:
	6166a3 plat: px30: config soc reset.
update feature:
	b6166a3 plat: px30: config soc reset.
	0935bda plat: px30: dram: update dcf code file to V1.01

Change-Id: I5e47bda9049fe29c2fcf717765d2aa4bfbc46c15
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
 2018-04-04 17:31:01 +08:00
Hisping Lin
46080b31de px30: bl32: update version to v1.06 
build from optee commit:
	59ae57  rk3326: crypto optimizes the code style

update features:
	5d06a5  rk3326: crypto fixed bug on gcm mode
	6d0e61  plat-rockchip: refine platform init sequence
	5fca8d  rk3326: crypto add sha512-224,sha512-256 and hmac-md5
	8298df  fast_smc: add a new interface for otp operation
	3adf65  libtomcrypt: modify return code when do ecc verify

Change-Id: Ica5eedc4a857f0ccb43aecb7a2531e8a394d197b
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
 2018-04-03 10:56:26 +08:00
Hisping Lin
4d9ee1549a rk3326: bl32: update version to v1.06 
build from optee commit:
	59ae57  rk3326: crypto optimizes the code style

update features:
	5d06a5  rk3326: crypto fixed bug on gcm mode
	6d0e61  plat-rockchip: refine platform init sequence
	5fca8d  rk3326: crypto add sha512-224,sha512-256 and hmac-md5
	8298df  fast_smc: add a new interface for otp operation
	3adf65  libtomcrypt: modify return code when do ecc verify

Change-Id: Icf543981da6656bbc4687781238f9b550e6eaeac
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
 2018-04-03 10:55:14 +08:00