tee with ta: update optee version to v1.97
tee without ta: update optee version to v1.92
build from optee commit:
2825a12 rk3228: do not cause panic when cpu/gpu use invalid pll
bb52c94 rk3228: do not cause panic when cpu/gpu use invalid pll
Change-Id: I458f8b1ce767d01b7f45cad351b6bc78cdc5dedb
Signed-off-by: Liang Chen <cl@rock-chips.com>
tee with ta: update optee version to v1.95
tee without ta: update optee version to v1.91
build from optee commit:
2825a12 rk3228: do not cause panic when cpu/gpu use invalid pll
bb52c94 rk3228: do not cause panic when cpu/gpu use invalid pll
Change-Id: If6ddf3d399fb03aa2c04f52f2838e042a62b03a9
Signed-off-by: Liang Chen <cl@rock-chips.com>
build from commit:
801e91f plat: rk3308: don't override bl32 and bl33 pc
update features:
801e91f plat: rk3308: don't override bl32 and bl33 pc
Change-Id: I30c240a7c903e37ff4ebacd1e1c76f1502ffca64
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
0x0 is valid load address which is used in 32-bit platforms.
Change-Id: I851b870651596e1d1bdeff59a037c13b428cd36c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
With this command, we can assign image size.
command format: --size [per image KB size] [copy count]
[per image KB size]: per copy image size(unit KB), should be 512Kb align;
[copy count]: copies count to pack;
Change-Id: I43c075c4b5018ed4f7af2966a07af73c974cde39
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Bl32 is disabled for rk3308, you should set SEC=1 to enable Bl32
build from:
71ddae4c plat-rockchip: refine memory map
Update feature:
71ddae4c plat-rockchip: refine memory map
e7765597 rk3326 & rk3308: otp: set otp clk div before R&W
86b7dafd rk3326 & rk3308: otp: modify set clk for user read
114d3965 rk3308: otp: increase wait time in check_sbpi_flag_state
916f2a26 rk3308: enable static ta for uboot secure store
08621e0b OTP: mask interrupt before OTP read & write
Change-Id: If82c7de24aeaafe0f526f2c58a3431ae0ffe99f4
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
c4654a6d libcrypto: fix crypto.a link error
Update feature:
c4654a6d libcrypto: fix crypto.a link error
631b37ed libcrypto: add base64_bio.c
3b853bca rpmb: be compatible with kernel bug
7a7383d8 static ta: support muti file system
Change-Id: Id65fd0090e807044bf7765b48c26dd9882fff02a
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
c4654a6d libcrypto: fix crypto.a link error
Update feature:
c4654a6d libcrypto: fix crypto.a link error
631b37ed libcrypto: add base64_bio.c
3b853bca rpmb: be compatible with kernel bug
7a7383d8 static ta: support muti file system
Change-Id: I5d2d24d516c288bb680883f1f1085b8202df0bc4
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop branch:
c4654a6d libcrypto: fix crypto.a link error
Update feature:
c4654a6d libcrypto: fix crypto.a link error
631b37ed libcrypto: add base64_bio.c
3b853bca rpmb: be compatible with kernel bug
7a7383d8 static ta: support muti file system
Change-Id: Idd2894ff9393113995ed253daf9ef450730687b0
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
from commit: ca6111834 rk312x usbplug support upgrade by LBA.
Change-Id: I6b5a114c92f8ea1c2a6da36366b1d95dbee2036c
Signed-off-by: chenfen <chenfen@rock-chips.com>
from commit:
rk3308_ddr_393MHz_v1.21.bin from 4929224 rk3308: DDR Version V1.21 in 393MHz
rk3308_ddr_451MHz_v1.21.bin from 82e6549 rk3308: DDR Version V1.21 in 451MHz
rk3308_ddr_589MHz_v1.21.bin from a321411 rk3308: DDR Version V1.21 in 589MHz
change:
enable ddr standby.
Change-Id: I7d1220e4b5823af1bc47ba9d31f31ddf9fe3dd5b
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
The v1.33 upgrade_tool supports gpt parameter flashing, usage:
$ sudo ./tools/upgrade_tool di -p ./tools/parameter_gpt.txt
Then it would write gpt table to emmc.
Change-Id: I6c4668d0405c880030cf4dfcc291caa62f23cf14
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
PX3SE uses its own miniloader and the cpu debug port
is uart1. It can share the tee binary with rk3126,
so make a soft link to RKTRUST/RK3126TOS.ini for RKTRUST/PX3SETOS.ini.
px3se_ddr_300MHz_v2.08.bin makes the uart1 as debug port.
Change-Id: Ifdca0e7206d5d0c38504b4f6ac7ddd6674e04f0a
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
built from ddr init project commit:
9e6431a Version: DDR Version 1.12 20180518
update feature:
1.fix ddr3 board power up fail because of lpddr4 commit
ddr3 power up fail at trust, and ddr3 board download flow can pass,
can enter system, reboot also pass, only power down and up, and hardware
reset can meet this problem.
the fail log as below:
NOTICE: BL31: Rockchip release version: v1.1
INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO: Using opteed sec cpu_context!
INFO: boot cpu mask: 0
ASSERT: bakery_lock_release <170> : bakery_ticket_number(bakery->lock_data[me])
Change-Id: Ie010c8f6f9c415538703256ea11218851ddd8f18
Signed-off-by: CanYang He <hcy@rock-chips.com>
from commit:
fdfa64b rk3308: DDR Version V1.20
change:
adjust auto power down and auto self-refresh for lower
power in VCC_DDR and VDD_CORE.
Change-Id: I17fe5d5621d2db7ea64dfb5848706c49da1c3974
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Build from ATF commit:
490c474 rk3308: set pwm pin pull none in gpio input mode
Update feature:
490c474 rk3308: set pwm pin pull none in gpio input mode
9b5adb5 rk3308: make suspend_mode_handler() suitable with kernel driver
a14f46a rk3308: save/restore cpu qos when system suspend
Change-Id: I1008a3926e252a7fa99b09ddc59794a116a9321c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
There are wrong rk3308_ddr_589MHz_v1.19.bin file before.
from commit:
4a256e5ccf8d rk3308: DDR Version V1.19
Change-Id: I58d2da2192714d6d9cd93dee4293d062d4efabb4
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
built from ddr init project commit:
d6e7216 Version: DDR Version 1.11 20180509
update feature:
1.support 1 cs lpddr4
2.support lpddr4 only one channel
3.remove some lpddr4 log
Change-Id: Iac48d346fb1e86193a82369d024100bd02dba6a5
Signed-off-by: CanYang He <hcy@rock-chips.com>
build from optee commit:
ac72e46 rk322x: ddr: use vop raw status to wait line flag
update feature:
ac72e46 rk322x: ddr: use vop raw status to wait line flag
eaebb17 static ta: modify efuse write times
33168af efuse: modify udelay function
60b8da4 efuse: mask interrupt before efuse read & write
Change-Id: I7e0f2ba8a597af82be153dd8c29963397e80d559
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
from commit:
4a256e5ccf8d rk3308: DDR Version V1.19
change:
1.check boot memory device.If loader device turn to maskrom
device,download is normal.
2.adjust dq10,dq11,dq14,dq15 de-skew for better dqs1 eye training.
3.reduce pll vco
4.change qos prority,reduce cpu QOS prority,improve
some QOS prority.
5.Do not clear grf_os_reg0 when boot mode is BOOT_BROM_DOWNLOAD
Change-Id: Ie7cb666c634ce41ea558acbd71096f0811fe3444
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
build from optee:
c72e46 rk322x: ddr: use vop raw status to wait line flag
update features:
apply arm errata 825619 and FOOBAR
Change-Id: Icfb7fd16803dbabaae70b50be67636afa2bf02ab
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
