built from ddr init project commit:
d6e7216 Version: DDR Version 1.11 20180509
update feature:
1.support 1 cs lpddr4
2.support lpddr4 only one channel
3.remove some lpddr4 log
Change-Id: Iac48d346fb1e86193a82369d024100bd02dba6a5
Signed-off-by: CanYang He <hcy@rock-chips.com>
build from optee commit:
ac72e46 rk322x: ddr: use vop raw status to wait line flag
update feature:
ac72e46 rk322x: ddr: use vop raw status to wait line flag
eaebb17 static ta: modify efuse write times
33168af efuse: modify udelay function
60b8da4 efuse: mask interrupt before efuse read & write
Change-Id: I7e0f2ba8a597af82be153dd8c29963397e80d559
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
from commit:
4a256e5ccf8d rk3308: DDR Version V1.19
change:
1.check boot memory device.If loader device turn to maskrom
device,download is normal.
2.adjust dq10,dq11,dq14,dq15 de-skew for better dqs1 eye training.
3.reduce pll vco
4.change qos prority,reduce cpu QOS prority,improve
some QOS prority.
5.Do not clear grf_os_reg0 when boot mode is BOOT_BROM_DOWNLOAD
Change-Id: Ie7cb666c634ce41ea558acbd71096f0811fe3444
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
build from optee:
c72e46 rk322x: ddr: use vop raw status to wait line flag
update features:
apply arm errata 825619 and FOOBAR
Change-Id: Icfb7fd16803dbabaae70b50be67636afa2bf02ab
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
build from optee commit:
e18ec91 workaround: rockchip: invalidate dcache before enable MMU
update feature:
e18ec91 workaround: rockchip: invalidate dcache before enable MMU
be33a34 rk3228: soc_monitor: make panic more powerful when soc check failed
e37b0f6 rk3228: soc_monitor: print some marks when panic
1ffdb85 rk322x: ddr: using aclk_vop to judge if vop is working
1c0d54b rpmb: add rpmb_test_key back
Change-Id: Ib3a5a72716c4fb371414f706fb5c45054c11e624
Signed-off-by: Zhang Zhijie <zhangzj@rock-chips.com>
from commit :
7b62dfc rk3308: DDR Version V1.11
add
1.set vpll0 in 1179.648MHz,vpll1 in 903.168MHz
2.ddr in vpll0,set 589MHz
3.adjusted deskew for aligning DQS and CK
4.delete clk 50% duty ratio setting in cru
5.set APLL,DPLL,VPLL0,VPLL1 without level shift
6.set pll vco high,but lower 3.2GHz,for minimum jitter.
7.add ddr scramble,include enable pmu pvtm.
8.updata ddr config grf_os_reg2,grf_os_reg3 to v1.08.
Change-Id: Ia459f53d7d9623f3af7e0de1edc2f99735d57c80
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
This is a temporary version, build from: c288f26
update features:
1. Support pwm regulator suspend voltage adjust;
2. Don't update voice VPLL.
Change-Id: I2620a245051a9cbd22ef81bdf9d19cf2ea5b4f28
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
built from ddr init project commit:
6ac5927 Version: DDR Version 1.10 20180410
update feature:
1.the init code change lpddr4 frequency from 50MHz to 400MHz,
and final to 800MHz, this version is a good support for
system suspend resume.
2.fix global reset fail when vdd_gpu power off
Change-Id: I490d26f243540d60bd6af2bfda3bddebf4218d1a
Signed-off-by: CanYang He <hcy@rock-chips.com>
from commit: ca6111834 rk3288 usbplug support upgrade by LBA.
Change-Id: I5b3bccfdcd58b92bfc9016deee6d4c6e23a8bde3
Signed-off-by: chenfen <chenfen@rock-chips.com>
from commit: 0d94125e9 update when chip_id is null,cann't use PX30 loader upgrade.
Change-Id: Ic696d2c76685545d49b4fc8a786b2fd29606f5a6
Signed-off-by: chenfen <chenfen@rock-chips.com>
from commit: ca6111834 rk3399 usbplug support upgrade by LBA.
Change-Id: Ib4f979f3e60bbd335fc394cac3544b8cbb669d2c
Signed-off-by: chenfen <chenfen@rock-chips.com>
Build git commit:
821ad49: rk3326: update version to v1.06
update list:
d929ffb: zftl: add data protect for SPOR
c459271: zftl: add debug interfase for linux kerenl
3d2dc46: zftl: zftl: add support micorn l05B
98625f0: zftl: fix page map gc lost data issue
Change-Id: I8be297240fdbdff5b38838834aa9520601db44d0
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
Build git commit:
821ad49: rk3326: update version to v1.06
update list:
d929ffb: zftl: add data protect for SPOR
c459271: zftl: add debug interfase for linux kerenl
3d2dc46: zftl: zftl: add support micorn l05B
98625f0: zftl: fix page map gc lost data issue
Change-Id: Ic6681a4b2d0f43f3394d380022e11c949e0e86c3
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
This is a temporary version, build from: c1be25b
Change-Id: I76137f36669c437f8d1cbe001d49f227690ee36d
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
build from optee commit:
f48c75 pta: support rk file system
update features:
944151 plat-rockchip: conf: add CFG_RK_RPMB_NO_DIRF_HASH
92bcdc plat-rockchip: increase the size of the optee os heap
Change-Id: Icbadc43f0bd5c2c0bd2840a8aa716b5a0e9ed32d
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit:
f48c75 pta: support rk file system
update features:
944151 plat-rockchip: conf: add CFG_RK_RPMB_NO_DIRF_HASH
92bcdc plat-rockchip: increase the size of the optee os heap
Change-Id: I228fe2d11fa5aa4c4379bb404a79ac5385aa4be9
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from optee commit:
e5297be rk322x: support virtual power off
update feature:
e5297be rk322x: support virtual power off
a511df5 rockchip: sip: add interface to config virtual pwroff
25074da plat-rockchip: add configure uart port function
4408b69 rk322x: ddr: fix lpddr2 bug
Change-Id: I73d125e2c669b817ba9801fba8569037930eee10
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
