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rockchip: rk3399-evb: Sync DT from v6.8 and update defconfig

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Sync rk3399-evb device tree from Linux kernel v6.8.

Drop bootph prop for i2c0 and rk808 node, PMIC support is not included
in TPL/SPL and PMIC regulators are working fine in U-Boot proper.

Change to use sdmmc_cd pinconf and drop cd-gpios for card detect pin.

Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB.

Remove CONFIG_NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on
cpuid read from eFUSE.

Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY.

Remove SPL_TINY_MEMSET=y to use full memset in SPL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman
2024-05-01 16:22:28 +00:00
committed by Kever Yang
parent b5f6e65d35
commit 055061dc35
3 changed files with 6 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/dts/rk3399-evb-u-boot.dtsi
View File

@@ -12,23 +12,14 @@
};
};
&i2c0 {
bootph-all;
};
&rk808 {
bootph-all;
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
disable-wp;
max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
};

3
arch/arm/dts/rk3399-evb.dts
View File

@@ -12,6 +12,7 @@
compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
aliases {
ethernet0 = &gmac;
mmc0 = &sdhci;
};
@@ -55,7 +56,7 @@
};
edp_panel: edp-panel {
compatible ="lg,lp079qx1-sp0v";
compatible = "lg,lp079qx1-sp0v";
backlight = <&backlight>;
enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
power-supply = <&vcc3v3_s0>;

6
configs/evb-rk3399_defconfig
View File

@@ -15,7 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
@@ -30,7 +30,6 @@ CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_HS400_SUPPORT=y
@@ -39,6 +38,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -69,5 +70,4 @@ CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
CONFIG_DISPLAY_ROCKCHIP_MIPI=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y