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clk: renesas: Do not disable realtime modules on R8A77995 D3

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Later versions of the datasheet makes it clear D3 do not have any
realtime module stop control registers (RMSTPCRx). Remove the
manipulation of them from the module clock table to match this.

Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
This commit is contained in:
Niklas Söderlund
2025-12-28 23:07:17 +01:00
committed by Marek Vasut
parent 3147cd713e
commit 06df1a5072
2 changed files with 14 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/clk/renesas/r8a77995-cpg-mssr.c
View File

@@ -216,18 +216,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] __initconst = {
};
static const struct mstp_stop_table r8a77995_mstp_table[] = {
{ 0x00210000, 0x0, 0x00210000, 0 },
{ 0x03e01000, 0x0, 0x03e01000, 0 },
{ 0x000e2fdc, 0x2000, 0x000e2fd8, 0 },
{ 0xc00014df, 0x400, 0xc00014df, 0 },
{ 0x80000004, 0x80, 0x80000004, 0 },
{ 0x40d20004, 0x0, 0x40d20004, 0 },
{ 0x08c0008c, 0x0, 0x08c0008c, 0 },
{ 0x09941c18, 0x0, 0x09941c18, 0 },
{ 0x00801087, 0x0, 0x00801087, 0 },
{ 0xf143dfc0, 0x0, 0xf143dfc0, 0 },
{ 0x063e1820, 0x0, 0x063e1820, 0 },
{ 0x00000000, 0x0, 0x00000000, 0 },
{ 0x00210000, 0x0, 0, 0 },
{ 0x03e01000, 0x0, 0, 0 },
{ 0x000e2fdc, 0x2000, 0, 0 },
{ 0xc00014df, 0x400, 0, 0 },
{ 0x80000004, 0x80, 0, 0 },
{ 0x40d20004, 0x0, 0, 0 },
{ 0x08c0008c, 0x0, 0, 0 },
{ 0x09941c18, 0x0, 0, 0 },
{ 0x00801087, 0x0, 0, 0 },
{ 0xf143dfc0, 0x0, 0, 0 },
{ 0x063e1820, 0x0, 0, 0 },
{ 0x00000000, 0x0, 0, 0 },
};
static const void *r8a77995_get_pll_config(const u32 cpg_mode)

3
drivers/clk/renesas/renesas-cpg-mssr.c
View File

@@ -127,7 +127,8 @@ int renesas_clk_remove(void __iomem *base, struct cpg_mssr_info *info)
info->mstp_table[i].sdis,
info->mstp_table[i].sen);
if (info->reg_layout == CLK_REG_LAYOUT_RCAR_GEN4)
if (info->reg_layout == CLK_REG_LAYOUT_RCAR_GEN4 ||
renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77995)
continue;
clrsetbits_le32(base + RMSTPCR(i),