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rockchip: rk3399-rock-pi-n10: Sync DT from v6.8 and update defconfig
Sync rk3399-rock-pi-n10 related device tree from Linux kernel v6.8. Remove SPL_GPIO=y, board does not use gpio in SPL. Change to SPL_MAX_SIZE=0x40000, SPL can be up to 256 KiB. Add ROCKCHIP_IODOMAIN=y to configure io-domain voltage. Add MMC_SDHCI_SDMA=y to use DMA transfer for eMMC. Add PHY_REALTEK=y and DM_ETH_PHY=y to support ethernet PHY. Remove REGULATOR_PWM=y, board does not use pwm-regulator compatible. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
committed by
Kever Yang
parent
04158eb451
commit
0c672bde09
@@ -231,11 +231,43 @@
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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status = "okay";
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hym8563: rtc@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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interrupt-parent = <&gpio5>;
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interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <0>;
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clock-output-names = "hym8563";
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pinctrl-names = "default";
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pinctrl-0 = <&hym8563_int>;
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};
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};
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&i2c5 {
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status = "okay";
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};
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&io_domains {
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bb-supply = <&vcc_io>;
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flash0-supply = <&vccio_flash>;
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gpio1830-supply = <&vcc_18>;
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gpio30-supply = <&vcc_io>;
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sdcard-supply = <&vccio_sd>;
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wifi-supply = <&vcc_wl>;
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status = "okay";
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};
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&pinctrl {
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hym8563 {
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hym8563_int: hym8563-int {
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rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
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drive-strength = <8>;
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};
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@@ -251,6 +283,12 @@
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};
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};
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sdio-pwrseq {
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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sdmmc_bus4: sdmmc-bus4 {
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rockchip,pins =
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@@ -282,6 +320,16 @@
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};
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};
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&sdio_pwrseq {
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; /* WIFI_REG_ON */
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};
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&usbphy {
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status = "okay";
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};
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@@ -13,8 +13,9 @@
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compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
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aliases {
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mmc0 = &sdmmc;
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mmc1 = &sdhci;
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ethernet0 = &gmac;
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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};
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vcc3v3_pcie: vcc-pcie-regulator {
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@@ -297,11 +298,10 @@
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clock-frequency = <400000>;
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status = "okay";
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hym8563: hym8563@51 {
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hym8563: rtc@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "hym8563";
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pinctrl-names = "default";
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pinctrl-0 = <&hym8563_int>;
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@@ -347,7 +347,7 @@
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pcie {
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pcie_pwr: pcie-pwr {
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rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
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rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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@@ -381,6 +381,16 @@
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pmu1830-supply = <&vcc_1v8>;
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};
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&sdio_pwrseq {
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
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};
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&sdhci {
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bus-width = <8>;
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mmc-hs400-1_8v;
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@@ -15,6 +15,14 @@
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#clock-cells = <0>;
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&hym8563>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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};
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vcc12v_dcin: vcc12v-dcin-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc12v_dcin";
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@@ -78,6 +86,19 @@
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status = "okay";
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};
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&sdio0 {
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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@@ -2,7 +2,6 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10"
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@@ -18,7 +17,7 @@ CONFIG_DEBUG_UART=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb"
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# CONFIG_CONSOLE_MUX is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x2e000
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CONFIG_SPL_MAX_SIZE=0x40000
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CONFIG_SPL_PAD_TO=0x7f8000
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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@@ -36,17 +35,20 @@ CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_ROCKCHIP_IODOMAIN=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH_PHY=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_NVME_PCI=y
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CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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# CONFIG_RAM_ROCKCHIP_DEBUG is not set
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