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imx: drop CONFIG_MXC_UART_BASE

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Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL,
the legacy macro no need to be defined.

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Soeren Moch <smoch@web.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Peng Fan
2022-06-11 20:20:54 +08:00
committed by Stefano Babic
parent a87a6fcd20
commit 0e1b54247d
13 changed files with 0 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/configs/aristainetos2.h
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@@ -14,10 +14,8 @@
#define CONFIG_HOSTNAME "aristainetos2"
#if (CONFIG_SYS_BOARD_VERSION == 5)
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONSOLE_DEV "ttymxc1"
#elif (CONFIG_SYS_BOARD_VERSION == 6)
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONSOLE_DEV "ttymxc0"
#endif

2
include/configs/imx8mm_evk.h
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@@ -57,8 +57,6 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_FEC_MXC_PHYADDR 0
#endif

3
include/configs/imx8mm_venice.h
View File

@@ -90,9 +90,6 @@
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* FEC */
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC

4
include/configs/imx8mn_bsh_smm_s2_common.h
View File

@@ -32,8 +32,4 @@
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
/* I2C */
#endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */

2
include/configs/imx8mn_evk.h
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@@ -64,6 +64,4 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#endif

3
include/configs/imx8mn_venice.h
View File

@@ -86,9 +86,6 @@
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* FEC */
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC

2
include/configs/imx8mp_evk.h
View File

@@ -69,6 +69,4 @@
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#endif

3
include/configs/imx8mp_venice.h
View File

@@ -86,9 +86,6 @@
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */
#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
/* FEC */
#define FEC_QUIRK_ENET_MAC

1
include/configs/mx7dsabresd.h
View File

@@ -12,7 +12,6 @@
#define PHYS_SDRAM_SIZE SZ_1G
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
#ifdef CONFIG_IMX_BOOTAUX
/* Set to QSPI1 A flash at default */

1
include/configs/somlabs_visionsom_6ull.h
View File

@@ -16,7 +16,6 @@
/* SPL options */
#include "imx6_spl.h"
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
#ifdef CONFIG_FSL_USDHC

3
include/configs/tbs2910.h
View File

@@ -20,9 +20,6 @@
#define CONFIG_SYS_BOOTMAPSZ 0x10000000
/* Serial console */
#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
/* Framebuffer */
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP

3
include/configs/verdin-imx8mm.h
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@@ -72,9 +72,6 @@
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* ENET */
#define CONFIG_FEC_MXC_PHYADDR 7

3
include/configs/verdin-imx8mp.h
View File

@@ -89,7 +89,4 @@
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
/* UART */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#endif /* __VERDIN_IMX8MP_H */