net: fsl_enetc: fix the duplex setting on the iMX platform

The iMX and LS platforms use different bits in the same register to
set duplex, but their logics are opposite.
The current settings will result in unexpected configurations in
RGMII mode.

Fixes: e6df2f5e22 ("net: fsl_enetc: Update enetc driver to support i.MX95")
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Clark Wang
2026-05-12 11:26:30 +08:00
committed by Fabio Estevam
parent a8684df5ed
commit 11af22cd1e

View File

@@ -18,6 +18,7 @@
#include <asm/io.h>
#include <pci.h>
#include <miiphy.h>
#include <linux/bitfield.h>
#include <linux/bug.h>
#include <linux/delay.h>
#include <linux/build_bug.h>
@@ -396,7 +397,7 @@ static int enetc_init_sgmii(struct udevice *dev)
/* set up MAC for RGMII */
static void enetc_init_rgmii(struct udevice *dev, struct phy_device *phydev)
{
u32 old_val, val, dpx = 0;
u32 old_val, val = 0;
old_val = val = enetc_read_mac_port(dev, ENETC_PM_IF_MODE);
@@ -416,15 +417,14 @@ static void enetc_init_rgmii(struct udevice *dev, struct phy_device *phydev)
val |= ENETC_PM_IFM_SSP_10;
}
if (enetc_is_imx95(dev))
dpx = ENETC_PM_IFM_FULL_DPX_IMX;
if (enetc_is_imx95(dev))
val = u32_replace_bits(val,
phydev->duplex == DUPLEX_FULL ? 0 : 1,
ENETC_PM_IFM_FULL_DPX_IMX);
else if (enetc_is_ls1028a(dev))
dpx = ENETC_PM_IFM_FULL_DPX_LS;
if (phydev->duplex == DUPLEX_FULL)
val |= dpx;
else
val &= ~dpx;
val = u32_replace_bits(val,
phydev->duplex == DUPLEX_FULL ? 1 : 0,
ENETC_PM_IFM_FULL_DPX_LS);
if (val == old_val)
return;