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spi: synquacer: remove SPI_TX_BYTE handling
Current code expects that SPI_TX_BYTE is single bit mode but it is wrong. It indicates byte program mode, not single bit mode. If SPI_TX_DUAL, SPI_TX_QUAD and SPI_TX_OCTAL bits are not set, the default transfer bus width is single bit. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
committed by
Jagan Teki
parent
55c0144bd3
commit
1d70101aa2
@@ -186,7 +186,7 @@ static void synquacer_spi_config(struct udevice *dev, void *rx, const void *tx)
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struct udevice *bus = dev->parent;
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struct synquacer_spi_priv *priv = dev_get_priv(bus);
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struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
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u32 val, div, bus_width = 1;
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u32 val, div, bus_width;
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int rwflag;
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rwflag = (rx ? 1 : 0) | (tx ? 2 : 0);
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@@ -203,16 +203,14 @@ static void synquacer_spi_config(struct udevice *dev, void *rx, const void *tx)
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priv->mode = slave_plat->mode;
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priv->speed = slave_plat->max_hz;
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if (priv->mode & SPI_TX_BYTE)
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bus_width = 1;
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else if (priv->mode & SPI_TX_DUAL)
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if (priv->mode & SPI_TX_DUAL)
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bus_width = 2;
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else if (priv->mode & SPI_TX_QUAD)
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bus_width = 4;
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else if (priv->mode & SPI_TX_OCTAL)
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bus_width = 8;
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else
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log_warning("SPI mode not configured, setting to byte mode\n");
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bus_width = 1; /* default is single bit mode */
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div = DIV_ROUND_UP(125000000, priv->speed);
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