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imx8mp_evk: Simplify Ethernet initialization

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With DM enabled, there is no need for board code to initialize
the Ethernet interfaces.

The RTL8211FDI Ethernet PHYs have 25MHz oscillator, so there is no
need to enable the RGMII TX clk output.

Also, there is no need for describing the deprecated phy-reset FEC
properties, nor passing reset properties to the EQOS interface in
u-boot.dtsi.

Remove all these unneeded pieces.

Tested both Ethernet interfaces after these changes.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
This commit is contained in:
Fabio Estevam
2023-10-19 18:51:12 -03:00
committed by Fabio Estevam
parent 7e3d6ec9bf
commit 21b30c237a
2 changed files with 1 additions and 41 deletions
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14
arch/arm/dts/imx8mp-evk-u-boot.dtsi
View File

@@ -137,17 +137,3 @@
&wdog1 {
bootph-pre-ram;
};
&ethphy0 {
reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
reset-delay-us = <15000>;
reset-post-delay-us = <100000>;
};
&fec {
phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
phy-reset-post-delay = <100>;
};

28
board/freescale/imx8mp_evk/imx8mp_evk.c
View File

@@ -7,8 +7,6 @@
#include <env.h>
#include <errno.h>
#include <init.h>
#include <miiphy.h>
#include <netdev.h>
#include <linux/delay.h>
#include <asm/global_data.h>
#include <asm/mach-imx/iomux-v3.h>
@@ -20,33 +18,9 @@
DECLARE_GLOBAL_DATA_PTR;
static void setup_fec(void)
{
struct iomuxc_gpr_base_regs *gpr =
(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
/* Enable RGMII TX clk output */
setbits_le32(&gpr->gpr[1], BIT(22));
}
#if CONFIG_IS_ENABLED(NET)
int board_phy_config(struct phy_device *phydev)
{
if (phydev->drv->config)
phydev->drv->config(phydev);
return 0;
}
#endif
int board_init(void)
{
int ret = 0;
if (IS_ENABLED(CONFIG_FEC_MXC)) {
setup_fec();
}
return ret;
return 0;
}
int board_late_init(void)