board: rockchip: Add minimal generic RK3328 board

Add a minimal generic RK3328 board that only have eMMC, SDMMC, SPI flash
and USB OTG enabled. This defconfig can be used to boot from eMMC,
SD-card or SPI flash on most RK3328 boards that follow reference board
design.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman
2025-03-30 17:20:34 +00:00
committed by Kever Yang
parent f7c8a69df1
commit 326e6b7a3b
6 changed files with 213 additions and 1 deletions

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@@ -0,0 +1,39 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk3328-u-boot.dtsi"
&gpio0 {
/delete-property/ bootph-pre-ram;
};
&pcfg_pull_down_4ma {
bootph-pre-ram;
bootph-some-ram;
};
&spi0 {
flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};
&spi0m2_clk {
bootph-pre-ram;
bootph-some-ram;
};
&spi0m2_cs0 {
bootph-pre-ram;
bootph-some-ram;
};
&spi0m2_rx {
bootph-pre-ram;
bootph-some-ram;
};
&spi0m2_tx {
bootph-pre-ram;
bootph-some-ram;
};

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@@ -0,0 +1,76 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Minimal generic DT for RK3328 with eMMC, SD-card, SPI flash and USB OTG enabled
*/
/dts-v1/;
#include "rk3328.dtsi"
/ {
model = "Generic RK3328";
compatible = "rockchip,rk3328";
aliases {
mmc0 = &emmc;
mmc1 = &sdmmc;
};
chosen {
stdout-path = "serial2:1500000n8";
};
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
status = "okay";
};
&sdmmc0m1_pin {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_down_4ma>;
};
&sdmmc {
bus-width = <4>;
cap-sd-highspeed;
disable-wp;
no-mmc;
no-sdio;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4 &sdmmc0m1_pin>;
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
};
};
&u2phy {
status = "okay";
};
&u2phy_otg {
status = "okay";
};
&uart2 {
status = "okay";
};
&usb20_otg {
dr_mode = "peripheral";
status = "okay";
};

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@@ -201,7 +201,6 @@ config ROCKCHIP_RK3328
select SUPPORT_SPL
select SPL
select SUPPORT_TPL
select TPL
select TPL_HAVE_INIT_STACK if TPL
imply ARMV8_CRYPTO
imply ARMV8_SET_SMPEN
@@ -218,6 +217,7 @@ config ROCKCHIP_RK3328
imply SPL_ROCKCHIP_COMMON_BOARD
imply SPL_SEPARATE_BSS
imply SPL_SERIAL
imply TPL if !ROCKCHIP_EXTERNAL_TPL
imply TPL_ROCKCHIP_COMMON_BOARD
imply TPL_SERIAL
help

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@@ -7,6 +7,12 @@ F: configs/evb-rk3328_defconfig
F: arch/arm/dts/rk3328-evb.dts
F: arch/arm/dts/rk3328-evb-u-boot.dtsi
GENERIC-RK3328
M: Jonas Karlman <jonas@kwiboo.se>
S: Maintained
F: configs/generic-rk3328_defconfig
F: arch/arm/dts/rk3328-generic*
NANOPI-R2C-RK3328
M: Tianling Shen <cnsztl@gmail.com>
S: Maintained

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@@ -0,0 +1,90 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=25000000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-generic"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_ROCKCHIP_EXTERNAL_TPL=y
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_BOOTMETH_VBE is not set
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-generic.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMINFO_MAP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MISC=y
CONFIG_CMD_MMC=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_RNG=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NO_NET=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_ADC is not set
CONFIG_CLK=y
CONFIG_SPL_CLK=y
# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
# CONFIG_ROCKCHIP_IODOMAIN is not set
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SILICONKAISER=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI_FLASH_ZBIT=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y

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@@ -66,6 +66,7 @@ List of mainline supported Rockchip boards:
- FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328)
- FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
- FriendlyElec NanoPi R2S Plus (nanopi-r2s-plus-rk3328)
- Generic RK3328 (generic-rk3328)
- Pine64 Rock64 (rock64-rk3328)
- Radxa ROCK Pi E (rock-pi-e-rk3328)
- Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328)