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arm: dts: mediatek: add USB/PHY nodes for Genio 520/720
Add USB and PHY nodes for USB support on Genio 520/720 EVKs. The devicetree hasn't been accepted upstream yet, so this comes from the latest submission [1]. Some power domain and reset references have been left out to minimize what we need to add at this time since U-Boot doesn't need them. Link: https://lore.kernel.org/linux-mediatek/20251111070031.305281-10-jh.hsu@mediatek.com/ [1] Link: https://patch.msgid.link/20260401-mtk-mt8189-usb-v1-2-a4bf951aa8ad@baylibre.com Signed-off-by: David Lechner <dlechner@baylibre.com>
This commit is contained in:
David Lechner
@@ -7,6 +7,7 @@
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#include <dt-bindings/clock/mediatek,mt8189-clk.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/reset/ti-syscon.h>
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/ {
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@@ -180,6 +181,79 @@
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status = "disabled";
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};
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xhci0: usb@11200000 {
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compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
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reg = <0 0x11200000 0 0x1000>,
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<0 0x11203e00 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts-extended = <&gic GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH 0>,
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<&pio 207 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host","wakeup";
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phys = <&u2port0 PHY_TYPE_USB2>,
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<&u3port0 PHY_TYPE_USB3>;
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clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB0_SYS>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB0_REF>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB0_H>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB0_F>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB0_XHCI>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB0_FRMCNT>;
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clock-names = "sys_ck", "ref_ck", "mcu_ck",
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"dma_ck", "xhci_ck", "frmcnt_ck";
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#address-cells = <1>;
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#size-cells = <0>;
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wakeup-source;
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mediatek,syscon-wakeup = <&pericfg_ao_clk 0x214 110>;
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status = "disabled";
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};
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xhci1: usb@11210000 {
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compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
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reg = <0 0x11210000 0 0x1000>,
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<0 0x11213e00 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts-extended = <&gic GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH 0>,
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<&pio 203 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host","wakeup";
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phys = <&u2port1 PHY_TYPE_USB2>;
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clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB1_SYS>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB1_REF>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB1_H>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB1_F>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB1_XHCI>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB1_FRMCNT>;
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clock-names = "sys_ck", "ref_ck","mcu_ck",
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"dma_ck", "xhci_ck", "frmcnt_ck";
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#address-cells = <1>;
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#size-cells = <0>;
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wakeup-source;
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mediatek,syscon-wakeup = <&pericfg_ao_clk 0x21c 110>;
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status = "disabled";
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};
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xhci2: usb@11220000 {
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compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
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reg = <0 0x11220000 0 0x1000>,
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<0 0x11223e00 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts-extended = <&gic GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH 0>,
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<&pio 193 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host","wakeup";
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phys = <&u2port2 PHY_TYPE_USB2>;
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clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB2_SYS>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB2_REF>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB2_H>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB2_F>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB2_XHCI>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB2_FRMCNT>;
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clock-names = "sys_ck", "ref_ck","mcu_ck",
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"dma_ck", "xhci_ck", "frmcnt_ck";
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#address-cells = <1>;
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#size-cells = <0>;
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wakeup-source;
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mediatek,syscon-wakeup = <&pericfg_ao_clk 0x27c 110>;
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status = "disabled";
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};
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mmc0: mmc@11230000 {
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compatible = "mediatek,mt8189-mmc";
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reg = <0 0x11230000 0 0x10000>,
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@@ -204,6 +278,55 @@
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status = "disabled";
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};
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xhci3: usb@11260000 {
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compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
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reg = <0 0x11260000 0 0x2e00>,
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<0 0x11263e00 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts-extended = <&gic GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH 0>,
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<&pio 188 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host","wakeup";
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phys = <&u2port3 PHY_TYPE_USB2>,
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<&u3port3 PHY_TYPE_USB3>;
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clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB3_SYS>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB3_REF>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB3_H>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB3_F>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB3_XHCI>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB3_FRMCNT>;
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clock-names = "sys_ck", "ref_ck", "mcu_ck",
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"dma_ck", "xhci_ck", "frmcnt_ck";
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#address-cells = <1>;
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#size-cells = <0>;
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wakeup-source;
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mediatek,syscon-wakeup = <&pericfg_ao_clk 0x284 110>;
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status = "disabled";
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};
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xhci4: usb@11270000 {
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compatible = "mediatek,mt8189-xhci", "mediatek,mtk-xhci";
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reg = <0 0x11270000 0 0x1000>,
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<0 0x11273e00 0 0x0100>;
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reg-names = "mac", "ippc";
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interrupts-extended = <&gic GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH 0>,
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<&pio 184 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host","wakeup";
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phys = <&u2port4 PHY_TYPE_USB2>;
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clocks = <&pericfg_ao_clk CLK_PERAO_SSUSB4_SYS>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB4_REF>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB4_H>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB4_F>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB4_XHCI>,
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<&pericfg_ao_clk CLK_PERAO_SSUSB4_FRMCNT>;
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clock-names = "sys_ck", "ref_ck", "mcu_ck",
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"dma_ck", "xhci_ck", "frmcnt_ck";
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#address-cells = <1>;
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#size-cells = <0>;
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wakeup-source;
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mediatek,syscon-wakeup = <&pericfg_ao_clk 0x28c 110>;
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status = "disabled";
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};
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clock-controller@1000c000 {
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compatible = "mediatek,mt8189-apmixedsys", "syscon";
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reg = <0 0x1000c000 0 0x1000>;
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@@ -359,6 +482,93 @@
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status = "disabled";
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};
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u3phy3: t-phy@11b00000 {
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compatible = "mediatek,mt8189-tphy",
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"mediatek,generic-tphy-v2";
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reg = <0 0x11b00000 0 0x700>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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u2port3: usb-phy@11b00000 {
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reg = <0 0x11b00000 0 0x700>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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u3port3: usb-phy@11b00700 {
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reg = <0 0x11b00700 0 0x700>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P3_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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};
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u2phy4: xs-phy@11b10000 {
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compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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u2port4: usb-phy@11b10000 {
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reg = <0 0x11b10000 0 0x700>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P4_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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};
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u3phy0: xs-phy@11e80000 {
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compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
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reg = <0 0x11e83000 0 0x200>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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u2port0: usb-phy@11e80000 {
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reg = <0 0x11e80000 0 0x700>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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u3port0: usb-phy@11e83000 {
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reg = <0 0x11e83400 0 0x500>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P0_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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};
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u2phy1: xs-phy@11e90000 {
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compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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u2port1: usb-phy@11e90000 {
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reg = <0 0x11e90000 0 0x700>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P1_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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};
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u2phy2: xs-phy@11ef0000 {
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compatible = "mediatek,mt8189-xsphy", "mediatek,xsphy";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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u2port2: usb-phy@11ef0000 {
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reg = <0 0x11ef0000 0 0x700>;
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clocks = <&topckgen_clk CLK_TOP_USB2_PHY_RF_P2_EN>;
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clock-names = "ref";
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#phy-cells = <1>;
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};
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};
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ufscfg_ao_reg_clk: syscon@112b8000 {
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compatible = "mediatek,mt8189-ufscfg-ao", "syscon", "simple-mfd";
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reg = <0 0x112b8000 0 0x1000>;
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@@ -19,6 +19,51 @@
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stdout-path = "serial0:921600n8";
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};
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usb_p0_vbus: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "p0_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 82 0>;
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enable-active-high;
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};
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usb_p1_vbus: regulator@1 {
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compatible = "regulator-fixed";
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regulator-name = "p1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 84 0>;
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enable-active-high;
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};
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usb_p2_vbus: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "p2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 85 0>;
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enable-active-high;
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};
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usb_p3_vbus: regulator@3 {
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compatible = "regulator-fixed";
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regulator-name = "p3_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 86 0>;
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enable-active-high;
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};
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usb_p4_vbus: regulator@4 {
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compatible = "regulator-fixed";
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regulator-name = "p4_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&pio 87 0>;
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enable-active-high;
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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@@ -241,3 +286,28 @@
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&pmic {
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interrupts-extended = <&pio 194 IRQ_TYPE_LEVEL_HIGH>;
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};
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&xhci0{
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vbus-supply = <&usb_p0_vbus>;
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status = "okay";
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};
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&xhci1{
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vbus-supply = <&usb_p1_vbus>;
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status = "okay";
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};
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&xhci2{
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vbus-supply = <&usb_p2_vbus>;
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status = "okay";
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};
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&xhci3{
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vbus-supply = <&usb_p3_vbus>;
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status = "okay";
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};
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&xhci4{
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vbus-supply = <&usb_p4_vbus>;
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status = "okay";
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};
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