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arch: arm: dts: k3: refactor common nodes to k3-*-r5.dtsi

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This patch refactors the nodes in each board's R5 device-tree to common
SoC level dtsi. No functional change is intended from this patch.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Bryan Brattlof <bb@ti.com>
This commit is contained in:
Anshul Dalal
2026-01-22 19:38:38 +05:30
committed by Tom Rini
parent b5213bbfdc
commit 3382d75f7a
27 changed files with 769 additions and 1303 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
arch/arm/dts/k3-am62-r5-lp-sk.dts
View File

@@ -9,84 +9,4 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am62-lp-sk-u-boot.dtsi"
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
status = "okay";
};
#include "k3-am625-r5.dtsi"

70
arch/arm/dts/k3-am625-r5-beagleplay.dts
View File

@@ -11,70 +11,14 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-beagleplay-u-boot.dtsi"
#include "k3-am625-r5.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1250000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
&a53_0 {
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1250000000>;
};
&main_pktdma {

80
arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
View File

@@ -10,42 +10,9 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-phyboard-lyra-rdk-u-boot.dtsi"
#include "k3-am625-r5.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
memory@80000000 {
device_type = "memory";
/* 2G RAM */
@@ -54,45 +21,19 @@
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&main_bcdma {
ti,sci = <&dm_tifs>;
&a53_0 {
clock-names = "gtc";
clocks = <&k3_clks 61 0>;
};
&main_pktdma {
ti,sci = <&dm_tifs>;
};
&main_bcdma {
ti,sci = <&dm_tifs>;
};
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-pins-default {
pinctrl-single,pins = <
@@ -105,11 +46,6 @@
};
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
pinctrl-names = "default";

86
arch/arm/dts/k3-am625-r5-sk.dts
View File

@@ -9,92 +9,8 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-sk-u-boot.dtsi"
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
status = "okay";
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};
#include "k3-am625-r5.dtsi"
&main_pktdma {
ti,sci = <&dm_tifs>;
bootph-all;
};

88
arch/arm/dts/k3-am625-r5.dtsi Normal file
View File

@@ -0,0 +1,88 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
status = "okay";
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};

81
arch/arm/dts/k3-am625-verdin-r5.dts
View File

@@ -9,75 +9,30 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am625-verdin-wifi-dev-u-boot.dtsi"
#include "k3-am625-r5.dtsi"
/ {
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
/*
* FIXME: Currently only the SPL running on the R5 has a clock
* driver. As a workaround therefore move the assigned-clock
* stuff required for our ETH_25MHz_CLK from the cpsw3g_mdio
* node of the regular device tree to here (last one each in
* below three lines, adding a <0> as spacing for parents).
*/
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 20>;
assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 22>;
assigned-clock-rates = <200000000>, <800000000>, <25000000>;
clocks = <&k3_clks 61 0>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
ti,sci = <&dmsc>;
ti,sci-host-id = <10>;
ti,sci-proc-id = <32>;
bootph-pre-ram;
};
aliases {
serial0 = &main_uart1;
serial1 = &wkup_uart0;
serial2 = &main_uart0;
serial3 = &mcu_uart0;
serial4 = &main_uart5;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
ti,host-id = <36>;
ti,secure-host;
bootph-pre-ram;
};
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
&a53_0 {
clocks = <&k3_clks 61 0>;
/*
* FIXME: Currently only the SPL running on the R5 has a clock
* driver. As a workaround therefore move the assigned-clock
* stuff required for our ETH_25MHz_CLK from the cpsw3g_mdio
* node of the regular device tree to here (last one each in
* below three lines, adding a <0> as spacing for parents).
*/
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 20>;
assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 22>;
assigned-clock-rates = <200000000>, <800000000>, <25000000>;
};

86
arch/arm/dts/k3-am6254atl-r5-sk.dts
View File

@@ -11,92 +11,8 @@
#include "k3-am62-ddr.dtsi"
#include "k3-am6254atl-sk-u-boot.dtsi"
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* We require this for boot handshake */
status = "okay";
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
status = "okay";
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};
#include "k3-am625-r5.dtsi"
&main_pktdma {
ti,sci = <&dm_tifs>;
bootph-all;
};

58
arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts
View File

@@ -13,48 +13,18 @@
#include "k3-am62a-ddr.dtsi"
#include "k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi"
#include "k3-am62a7-r5.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial3 = &main_uart1;
};
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
memory@80000000 {
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
bootph-pre-ram;
};
&a53_0 {
clocks = <&k3_clks 61 0>;
clock-names = "gtc";
};
&cbass_main {
@@ -79,24 +49,6 @@
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
bootph-pre-ram;
};
&main_bcdma {
ti,sci = <&dm_tifs>;
};

60
arch/arm/dts/k3-am62a7-r5-sk.dts
View File

@@ -9,50 +9,12 @@
#include "k3-am62a-ddr.dtsi"
#include "k3-am62a7-sk-u-boot.dtsi"
#include "k3-am62a7-r5.dtsi"
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
@@ -61,26 +23,6 @@
bootph-pre-ram;
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
bootph-pre-ram;
};
&wkup_uart0_pins_default {
bootph-pre-ram;
};

69
arch/arm/dts/k3-am62a7-r5.dtsi Normal file
View File

@@ -0,0 +1,69 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
bootph-pre-ram;
};

72
arch/arm/dts/k3-am62d2-r5-evm.dts
View File

@@ -9,74 +9,4 @@
#include "k3-am62a-ddr.dtsi"
#include "k3-am62d2-evm-u-boot.dtsi"
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* Needed for initial handshake with ROM */
status = "okay";
bootph-pre-ram;
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
bootph-pre-ram;
};
#include "k3-am62d2-r5.dtsi"

75
arch/arm/dts/k3-am62d2-r5.dtsi Normal file
View File

@@ -0,0 +1,75 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
tick-timer = &main_timer0;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&secure_proxy_sa3 {
/* Needed for initial handshake with ROM */
status = "okay";
bootph-pre-ram;
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&secure_proxy_sa3 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-pre-ram;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
bootph-pre-ram;
};

69
arch/arm/dts/k3-am62p5-r5-sk.dts
View File

@@ -9,81 +9,14 @@
#include "k3-am62p-ddr-lp4-50-1600.dtsi"
#include "k3-am62a-ddr.dtsi"
#include "k3-am62p5-r5.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial2 = &main_uart0;
serial3 = &main_uart1;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 20>,
<&secure_proxy_main 21>;
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
/* WKUP UART0 is used for DM firmware logs */

77
arch/arm/dts/k3-am62p5-r5.dtsi Normal file
View File

@@ -0,0 +1,77 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 20>,
<&secure_proxy_main 21>;
bootph-all;
};
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};

76
arch/arm/dts/k3-am62p5-verdin-r5.dts
View File

@@ -9,76 +9,10 @@
#include "k3-am62a-ddr.dtsi"
#include "k3-am62p5-verdin-wifi-dev-u-boot.dtsi"
#include "k3-am62p5-r5.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 36>;
assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 38>;
assigned-clock-rates = <200000000>, <1200000000>, <25000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 20>,
<&secure_proxy_main 21>;
bootph-all;
};
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
&a53_0 {
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 36>;
assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 38>;
assigned-clock-rates = <200000000>, <1200000000>, <25000000>;
};

81
arch/arm/dts/k3-am642-r5-evm.dts
View File

@@ -8,56 +8,7 @@
#include "k3-am64-ddr.dtsi"
#include "k3-am642-evm-u-boot.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
clk_200mhz: dummy-clock-200mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
#include "k3-am642-r5.dtsi"
&memorycontroller {
vtt-supply = <&vtt_supply>;
@@ -72,33 +23,3 @@
clocks = <&clk_200mhz>;
clock-names = "clk_xin";
};
/* UART is initialized before SYSFW is started
* so we can't do any power-domain/clock operations.
* Delete clock/power-domain properties to avoid
* UART init failure
*/
&main_uart0 {
/delete-property/ power-domains;
/delete-property/ clocks;
/delete-property/ clock-names;
};
/* timer init is called as part of rproc_start() while
* starting System Firmware, so any clock/power-domain
* operations will fail as SYSFW is not yet up and running.
* Delete all clock/power-domain properties to avoid
* timer init failure.
* This is an always on timer at 20MHz.
*/
&main_timer0 {
/delete-property/ clocks;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ power-domains;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x8000000>;
};

76
arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts
View File

@@ -14,83 +14,15 @@
#include "k3-am64-ddr.dtsi"
#include "k3-am642-phyboard-electra-rdk-u-boot.dtsi"
#include "k3-am642-r5.dtsi"
/ {
aliases {
ethernet0 = &cpsw3g;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
clk_200mhz: dummy-clock-200mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
/* timer init is called as part of rproc_start() while
* starting System Firmware, so any clock/power-domain
* operations will fail as SYSFW is not yet up and running.
* Delete all clock/power-domain properties to avoid
* timer init failure.
* This is an always on timer at 20MHz.
*/
&main_timer0 {
/delete-property/ clocks;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ power-domains;
};
/* UART is initialized before SYSFW is started
* so we can't do any power-domain/clock operations.
* Delete clock/power-domain properties to avoid
* UART init failure
*/
&main_uart0 {
/delete-property/ power-domains;
/delete-property/ clocks;
/delete-property/ clock-names;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
&a53_0 {
clock-names = "gtc";
clocks = <&k3_clks 61 0>;
};

81
arch/arm/dts/k3-am642-r5-sk.dts
View File

@@ -8,56 +8,7 @@
#include "k3-am64-ddr.dtsi"
#include "k3-am642-sk-u-boot.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
clk_200mhz: dummy-clock-200mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
#include "k3-am642-r5.dtsi"
&sdhci1 {
clocks = <&clk_200mhz>;
@@ -67,33 +18,3 @@
&serdes_wiz0 {
status = "okay";
};
/* UART is initialized before SYSFW is started
* so we can't do any power-domain/clock operations.
* Delete clock/power-domain properties to avoid
* UART init failure
*/
&main_uart0 {
/delete-property/ power-domains;
/delete-property/ clocks;
/delete-property/ clock-names;
};
/* timer init is called as part of rproc_start() while
* starting System Firmware, so any clock/power-domain
* operations will fail as SYSFW is not yet up and running.
* Delete all clock/power-domain properties to avoid
* timer init failure.
* This is an always on timer at 20MHz.
*/
&main_timer0 {
/delete-property/ clocks;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ power-domains;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x8000000>;
};

84
arch/arm/dts/k3-am642-r5.dtsi Normal file
View File

@@ -0,0 +1,84 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
clk_200mhz: dummy-clock-200mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
};
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
/* UART is initialized before SYSFW is started
* so we can't do any power-domain/clock operations.
* Delete clock/power-domain properties to avoid
* UART init failure
*/
&main_uart0 {
/delete-property/ power-domains;
/delete-property/ clocks;
/delete-property/ clock-names;
};
/* timer init is called as part of rproc_start() while
* starting System Firmware, so any clock/power-domain
* operations will fail as SYSFW is not yet up and running.
* Delete all clock/power-domain properties to avoid
* timer init failure.
* This is an always on timer at 20MHz.
*/
&main_timer0 {
/delete-property/ clocks;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ power-domains;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x8000000>;
};

74
arch/arm/dts/k3-am654-r5-base-board.dts
View File

@@ -9,74 +9,7 @@
#include "k3-am654-base-board-u-boot.dtsi"
#include "k3-am654-base-board-ddr4-1600MTs.dtsi"
#include "k3-am654-ddr.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 202 0>;
assigned-clock-rates = <800000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
clk_200mhz: dummy_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
};
&secure_proxy_mcu {
status = "okay";
bootph-pre-ram;
};
&cbass_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
/*
* timer init is called as part of rproc_start() while
* starting System Firmware, so any clock/power-domain
* operations will fail as SYSFW is not yet up and running.
* Delete all clock/power-domain properties to avoid
* timer init failure.
* This is an always on timer at 20MHz.
*/
&mcu_timer0 {
/delete-property/ clocks;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ power-domains;
};
&dmsc {
mboxes = <&secure_proxy_mcu 8>,
<&secure_proxy_mcu 6>,
<&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
};
#include "k3-am654-r5.dtsi"
&wkup_uart0 {
status = "okay";
@@ -128,11 +61,6 @@
/delete-property/ power-domains;
};
&ospi0 {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
};
&dwc3_0 {
status = "okay";
/delete-property/ clocks;

77
arch/arm/dts/k3-am654-r5.dtsi Normal file
View File

@@ -0,0 +1,77 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 202 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 202 0>;
assigned-clock-rates = <800000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
clk_200mhz: dummy_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
};
&secure_proxy_mcu {
status = "okay";
bootph-pre-ram;
};
&cbass_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes = <&secure_proxy_mcu 8>,
<&secure_proxy_mcu 6>,
<&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
};
&ospi0 {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
};
/*
* timer init is called as part of rproc_start() while
* starting System Firmware, so any clock/power-domain
* operations will fail as SYSFW is not yet up and running.
* Delete all clock/power-domain properties to avoid
* timer init failure.
* This is an always on timer at 20MHz.
*/
&mcu_timer0 {
/delete-property/ clocks;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ power-domains;
};

67
arch/arm/dts/k3-am67a-r5-beagley-ai.dts
View File

@@ -11,72 +11,7 @@
#include "k3-am67a-beagley-ddr-lp4.dtsi"
#include "k3-am62a-ddr.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial2 = &main_uart0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};
#include "k3-am67a-r5.dtsi"
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {

70
arch/arm/dts/k3-am67a-r5.dtsi Normal file
View File

@@ -0,0 +1,70 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial2 = &main_uart0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>;
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 22>,
<&secure_proxy_main 23>;
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};

82
arch/arm/dts/k3-j7200-r5-common-proc-board.dts
View File

@@ -9,92 +9,12 @@
#include "k3-j7200-ddr-evm-lp4-2666.dtsi"
#include "k3-j721e-ddr.dtsi"
#include "k3-j7200-common-proc-board-u-boot.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
};
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>, <&k3_clks 202 2>, <&k3_clks 4 1> ;
clock-names = "gtc", "core", "msmc";
assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 4 1>,
<&k3_clks 323 0>;
assigned-clock-parents= <0>, <0>, <0>, <&k3_clks 323 2>;
assigned-clock-rates = <2000000000>, <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <3>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes = <&secure_proxy_mcu 21>,
<&secure_proxy_mcu 23>;
bootph-pre-ram;
};
};
&memorycontroller {
power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
<&k3_pds 90 TI_SCI_PD_SHARED>;
clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
bootph-pre-ram;
};
&mcu_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <250000000>;
bootph-pre-ram;
};
&secure_proxy_mcu {
bootph-pre-ram;
status = "okay";
};
&cbass_mcu_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_mcu 4>,
<&secure_proxy_mcu 5>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes = <&secure_proxy_mcu 8>,
<&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
bootph-pre-ram;
};
#include "k3-j7200-r5.dtsi"
&wkup_vtm0 {
bootph-pre-ram;
};
&ospi0 {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
};
&fss {
/* enable ranges missing from the FSS node */
ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,

86
arch/arm/dts/k3-j7200-r5.dtsi Normal file
View File

@@ -0,0 +1,86 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
};
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>, <&k3_clks 202 2>, <&k3_clks 4 1> ;
clock-names = "gtc", "core", "msmc";
assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 4 1>,
<&k3_clks 323 0>;
assigned-clock-parents= <0>, <0>, <0>, <&k3_clks 323 2>;
assigned-clock-rates = <2000000000>, <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <3>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes = <&secure_proxy_mcu 21>,
<&secure_proxy_mcu 23>;
bootph-pre-ram;
};
};
&memorycontroller {
power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
<&k3_pds 90 TI_SCI_PD_SHARED>;
clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
bootph-pre-ram;
};
&mcu_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <250000000>;
bootph-pre-ram;
};
&secure_proxy_mcu {
bootph-pre-ram;
status = "okay";
};
&cbass_mcu_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_mcu 4>,
<&secure_proxy_mcu 5>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes = <&secure_proxy_mcu 8>,
<&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
bootph-pre-ram;
};
&ospi0 {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
};

81
arch/arm/dts/k3-j722s-r5-evm.dts
View File

@@ -9,92 +9,13 @@
#include "k3-j722s-ddr-lp4-50-4000.dtsi"
#include "k3-am62a-ddr.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial2 = &main_uart0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1400000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 28>,
<&secure_proxy_main 29>;
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
#include "k3-j722s-r5.dtsi"
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
status = "okay";
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};
&main_bcdma {
ti,sci = <&dm_tifs>;
};

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arch/arm/dts/k3-j722s-r5.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
*/
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
serial0 = &wkup_uart0;
serial2 = &main_uart0;
};
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 135 0>;
clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
clock-names = "gtc", "core";
assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
assigned-clock-parents = <&k3_clks 61 2>;
assigned-clock-rates = <200000000>, <1400000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-all;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <36>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy_main 28>,
<&secure_proxy_main 29>;
bootph-all;
};
};
&dmsc {
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
mbox-names = "rx", "tx", "notify";
ti,host-id = <35>;
ti,secure-host;
};
&cbass_main {
sa3_secproxy: secproxy@44880000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg = <0x00 0x44880000 0x00 0x20000>,
<0x00 0x44860000 0x00 0x20000>,
<0x00 0x43600000 0x00 0x10000>;
reg-names = "rt", "scfg", "target_data";
bootph-all;
};
sysctrler: sysctrler {
compatible = "ti,am654-tisci-rproc-r5";
mboxes= <&secure_proxy_main 1>,
<&secure_proxy_main 0>,
<&sa3_secproxy 0>;
mbox-names = "tx", "rx", "boot_notify";
bootph-all;
};
};
&main_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <25000000>;
};
&ospi0 {
reg = <0x00 0x0fc40000 0x00 0x100>,
<0x00 0x60000000 0x00 0x08000000>;
};