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ram: k3-ddrss: Add CONFIG_K3_MULTI_DDR

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As we increase the functionalities that the K3 DDRSS sub-system support,
it is becoming more evident that the same logic cannot apply to both
single as well as multiple DDR controller devices. Add
CONFIG_K3_MULTI_DDR to be used to differentiate between the two.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
This commit is contained in:
Neha Malcom Francis
2025-08-12 18:13:20 +05:30
committed by Tom Rini
parent f43f710122
commit 3a0793fe9b
1 changed files with 10 additions and 0 deletions
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10
drivers/ram/Kconfig
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@@ -128,6 +128,16 @@ config K3_INLINE_ECC
need to be primed with a predefined value prior to enabling ECC
check.
config K3_MULTI_DDR
bool "Enable support for multiple K3 DDRSS controllers"
depends on K3_DDRSS
help
Enabling this option adds support for configuring multiple DDR memory
controllers for K3 devices. The external memory interleave layer
present in the MSMC (Multicore Shared Memory Controller) is
responsible for interleaving between the controllers.
default y if SOC_K3_J721S2 || SOC_K3_J784S4
source "drivers/ram/aspeed/Kconfig"
source "drivers/ram/cadence/Kconfig"
source "drivers/ram/octeon/Kconfig"