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arm: mach-k3: Move disable_linefill_optimization() into R5 directory

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The disable_linefill_optimization() function is only ever loaded by the
R5 core, move the code into the R5 directory.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
This commit is contained in:
Andrew Davis
2024-02-01 18:24:44 -06:00
committed by Tom Rini
parent 5bc0a260d1
commit 3e572c9bed
3 changed files with 36 additions and 25 deletions
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25
arch/arm/mach-k3/common.c
View File

@@ -453,31 +453,6 @@ void board_prep_linux(struct bootm_headers *images)
}
#endif
#ifdef CONFIG_CPU_V7R
void disable_linefill_optimization(void)
{
u32 actlr;
/*
* On K3 devices there are 2 conditions where R5F can deadlock:
* 1.When software is performing series of store operations to
* cacheable write back/write allocate memory region and later
* on software execute barrier operation (DSB or DMB). R5F may
* hang at the barrier instruction.
* 2.When software is performing a mix of load and store operations
* within a tight loop and store operations are all writing to
* cacheable write back/write allocates memory regions, R5F may
* hang at one of the load instruction.
*
* To avoid the above two conditions disable linefill optimization
* inside Cortex R5F.
*/
asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
actlr |= (1 << 13); /* Set DLFO bit */
asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
}
#endif
static void remove_fwl_regions(struct fwl_data fwl_data, size_t num_regions,
enum k3_firewall_region_type fwl_type)
{

1
arch/arm/mach-k3/r5/Makefile
View File

@@ -10,6 +10,7 @@ obj-$(CONFIG_SOC_K3_AM625) += am62x/
obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
obj-$(CONFIG_SOC_K3_J784S4) += j784s4/
obj-y += common.o
obj-y += lowlevel_init.o
obj-y += r5_mpu.o

35
arch/arm/mach-k3/r5/common.c Normal file
View File

@@ -0,0 +1,35 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* K3: R5 Common Architecture initialization
*
* Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <linux/types.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include "../common.h"
void disable_linefill_optimization(void)
{
u32 actlr;
/*
* On K3 devices there are 2 conditions where R5F can deadlock:
* 1.When software is performing series of store operations to
* cacheable write back/write allocate memory region and later
* on software execute barrier operation (DSB or DMB). R5F may
* hang at the barrier instruction.
* 2.When software is performing a mix of load and store operations
* within a tight loop and store operations are all writing to
* cacheable write back/write allocates memory regions, R5F may
* hang at one of the load instruction.
*
* To avoid the above two conditions disable linefill optimization
* inside Cortex R5F.
*/
asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
actlr |= (1 << 13); /* Set DLFO bit */
asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
}