arch: arm: dts: ls1043a: sync serial nodes with Linux

Pick up the serial node descriptions from Linux v6.3 for the ls1043ardb
board and its dependencies. Including the fsl,qoriq-clockgen.h and
arm-gic.h headers forces us to change the include directives to explicitly
go through the C preprocessor for all boards in the ls1043a SoC family.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Camelia Groza
2023-06-16 16:18:32 +03:00
committed by Peng Fan
parent e80f4079b3
commit 41651ea098
3 changed files with 17 additions and 7 deletions

View File

@@ -7,7 +7,7 @@
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
/include/ "fsl-ls1043a.dtsi"
#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A QDS Board";

View File

@@ -9,13 +9,17 @@
*/
/dts-v1/;
/include/ "fsl-ls1043a.dtsi"
#include "fsl-ls1043a.dtsi"
/ {
model = "LS1043A RDB Board";
aliases {
spi1 = &dspi0;
serial0 = &duart0;
serial1 = &duart1;
serial2 = &duart2;
serial3 = &duart3;
};
};

View File

@@ -8,7 +8,9 @@
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
/include/ "skeleton64.dtsi"
#include "skeleton64.dtsi"
#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "fsl,ls1043a";
@@ -223,28 +225,32 @@
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0500 0x0 0x100>;
interrupts = <0 54 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
duart1: serial@21c0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0600 0x0 0x100>;
interrupts = <0 54 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
duart2: serial@21d0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0500 0x0 0x100>;
interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
duart3: serial@21d0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0600 0x0 0x100>;
interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(1)>;
};
lpuart0: serial@2950000 {