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Merge patch series "Add WDT support for J7200 SOC"
Udit Kumar <u-kumar1@ti.com> says: This enables the ESMs and the associated PMIC. Programming these bits is a requirement to make the watchdog actually reset the board. After DT sync nodes bucka1 and main_esm has bootph property added in pmic nodes. RFC was sent https://lore.kernel.org/all/20241126063543.2678052-1-u-kumar1@ti.com/ With current patch boot logs https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b reset: https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b#file-gistfile1-txt-L2344 Link: https://lore.kernel.org/r/20250314110411.2781732-1-u-kumar1@ti.com
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@@ -120,3 +120,10 @@
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vdd-supply-2 = <&buckb1>;
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bootph-pre-ram;
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};
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&tps659414 {
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esm: esm {
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compatible = "ti,tps659413-esm";
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bootph-pre-ram;
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};
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};
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@@ -99,7 +99,9 @@ CONFIG_DM_MAILBOX=y
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CONFIG_K3_SEC_PROXY=y
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CONFIG_FS_LOADER=y
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CONFIG_SPL_FS_LOADER=y
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CONFIG_ESM_K3=y
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CONFIG_K3_AVS0=y
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CONFIG_ESM_PMIC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_SPL_MMC_HS400_SUPPORT=y
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CONFIG_MMC_SDHCI=y
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