ARM: dts: imx8m: add UHS or HS400/HS400ES properties

i.MX8M series provide support for high speed grades in their
usdhc controllers, which has eMMC and SDHC connected to them.

Enable this support across the entire i.MX8M family by providing quirks
to usdhc controllers designated by storage media connected to them.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>

arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi

@@ -118,8 +118,11 @@
 
 &usdhc1 {
 	u-boot,dm-spl;
+	mmc-hs400-1_8v;
 };
 
 &usdhc2 {
 	u-boot,dm-spl;
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
 };

arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi

@@ -118,8 +118,11 @@
 
 &usdhc1 {
 	u-boot,dm-spl;
+	mmc-hs400-1_8v;
 };
 
 &usdhc2 {
 	u-boot,dm-spl;
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
 };

arch/arm/dts/imx8mm-evk-u-boot.dtsi

@@ -100,10 +100,14 @@
 
 &usdhc2 {
 	u-boot,dm-spl;
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
 };
 
 &usdhc3 {
 	u-boot,dm-spl;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
 };
 
 &i2c1 {

arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi

@@ -97,10 +97,14 @@
 
 &usdhc2 {
 	u-boot,dm-spl;
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
 };
 
 &usdhc3 {
 	u-boot,dm-spl;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
 };
 
 &wdog1 {

arch/arm/dts/imx8mp-evk-u-boot.dtsi

@@ -126,10 +126,14 @@
 
 &usdhc2 {
 	u-boot,dm-spl;
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
 };
 
 &usdhc3 {
 	u-boot,dm-spl;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
 };
 
 &wdog1 {

arch/arm/dts/imx8mq-evk-u-boot.dtsi

@@ -3,3 +3,12 @@
 &reg_usdhc2_vmmc {
 	u-boot,off-on-delay-us = <20000>;
 };
+
+&usdhc1 {
+	mmc-hs400-1_8v;
+};
+
+&usdhc2 {
+	sd-uhs-sdr104;
+	sd-uhs-ddr50;
+};