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arm: socfpga: agilex5: Sub-device check enabled for runtime workaround
Sub-device information is retrieved from the JTAG ID in Boot Scratch Cold 4 Register. This interface is introduced to allow device-specific errata workarounds to be applied in the future, based on the detected sub-device type. Signed-off-by: Tingting Meng <tingting.meng@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
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committed by
Tien Fong Chee
parent
8eb3812c58
commit
5119cffaf4
@@ -22,6 +22,22 @@
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DECLARE_GLOBAL_DATA_PTR;
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/* Agilex5 Sub Device Jtag ID List */
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#define A3690_JTAG_ID 0x036090DD
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#define A3694_JTAG_ID 0x436090DD
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#define A36C0_JTAG_ID 0x0360C0DD
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#define A36C4_JTAG_ID 0x4360C0DD
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#define A36D0_JTAG_ID 0x0360D0DD
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#define A36D4_JTAG_ID 0x4360D0DD
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#define A36F0_JTAG_ID 0x0360F0DD
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#define A36F4_JTAG_ID 0x4360F0DD
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#define A3610_JTAG_ID 0x036010DD
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#define A3614_JTAG_ID 0x436010DD
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#define A3630_JTAG_ID 0x036030DD
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#define A3634_JTAG_ID 0x436030DD
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#define JTAG_ID_MASK 0xCFF0FFFF
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/*
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* FPGA programming support for SoC FPGA Stratix 10
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*/
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@@ -42,6 +58,22 @@ static Altera_desc altera_fpga[] = {
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},
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};
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u32 socfpga_get_jtag_id(void)
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{
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u32 jtag_id;
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jtag_id = readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD4);
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if (!jtag_id) {
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debug("Failed to read JTAG ID. Default JTAG ID to A36F4_JTAG_ID.\n");
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jtag_id = A36F4_JTAG_ID;
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}
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debug("%s: jtag_id: 0x%x\n", __func__, jtag_id);
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return jtag_id;
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}
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/*
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* The Agilex5 platform has enabled the bloblist feature, and the bloblist
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* address and size are initialized based on the defconfig settings.
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