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clk: mediatek: mt7622: fix infracfg and pericfg clock operations

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The MT7622 infracfg and pericfg drivers both use
mtk_common_clk_infrasys_init() for probe, which populates struct
mtk_clk_priv and stores gate definitions in the clk_tree. However,
both drivers were incorrectly wired to mtk_clk_gate_ops which expects
struct mtk_cg_priv with separately populated gates/num_gates/gates_offs
fields from mtk_common_clk_gate_init().

Since those fields were never set, any attempt to enable an infracfg or
pericfg gate clock (e.g. CLK_INFRA_TRNG) would fail with -EINVAL.

Switch both to mtk_clk_infrasys_ops and struct mtk_clk_priv to match
the init function.

Fixes: 72ab603b20 ("clk: mediatek: add driver for MT7622")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
This commit is contained in:
Daniel Golle
2026-03-04 03:53:38 +00:00
committed by David Lechner
parent ba7bf918da
commit 52d84fccfd
1 changed files with 4 additions and 4 deletions
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8
drivers/clk/mediatek/clk-mt7622.c
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@@ -821,8 +821,8 @@ U_BOOT_DRIVER(mtk_clk_infracfg) = {
.id = UCLASS_CLK,
.of_match = mt7622_infracfg_compat,
.probe = mt7622_infracfg_probe,
.priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_infrasys_ops,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -831,8 +831,8 @@ U_BOOT_DRIVER(mtk_clk_pericfg) = {
.id = UCLASS_CLK,
.of_match = mt7622_pericfg_compat,
.probe = mt7622_pericfg_probe,
.priv_auto = sizeof(struct mtk_cg_priv),
.ops = &mtk_clk_gate_ops,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_infrasys_ops,
.flags = DM_FLAG_PRE_RELOC,
};