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Merge patch series "modify npcm7xx/8xx feature and bug fixed"

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Jim Liu <jim.t90615@gmail.com> says:

Modify npcm7xx/8xx features and bug fixes.

Link: https://lore.kernel.org/r/20251216024729.1031306-1-JJLIU0@nuvoton.com
This commit is contained in:
Tom Rini
2025-12-31 10:17:14 -06:00
parent 101d0cc681 8043053099
commit 601733e708
5 changed files with 55 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/dts/nuvoton-npcm845-pincfg.dtsi
View File

@@ -1619,27 +1619,27 @@
output-low;
};
gpio191o_pins: gpio191o-pins {
pins = "GPIO191/SPI1_D1/FANIN17/FM1_D1/STRAP10";
pins = "GPIO191/SPI1_D2/SPI1_nCS2/FM1_D2/SMB15B_SDA";
bias-disable;
output-high;
};
gpio191ol_pins: gpio191ol-pins {
pins = "GPIO191/SPI1_D1/FANIN17/FM1_D1/STRAP10";
pins = "GPIO191/SPI1_D2/SPI1_nCS2/FM1_D2/SMB15B_SDA";
bias-disable;
output-low;
};
gpio192_pins: gpio192-pins {
pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL";
pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15B_SCL";
bias-disable;
input-enable;
};
gpio192o_pins: gpio192o-pins {
pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL";
pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15B_SCL";
bias-disable;
output-high;
};
gpio192ol_pins: gpio192ol-pins {
pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL";
pins = "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15B_SCL";
bias-disable;
output-low;
};

46
arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
View File

@@ -395,6 +395,36 @@
gpio-bank-name = "gpio7";
};
gpio8: sgpio1@101000 {
compatible = "nuvoton,npcm845-sgpio";
reg = <0x101000 0x200>;
pinctrl-names = "default";
pinctrl-0 = <&iox1_pins>;
syscon-rst = <&rstc>;
#address-cells = <1>;
#size-cells = <0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio8";
nuvoton,input-ngpios = <0>;
nuvoton,output-ngpios = <0>;
};
gpio9: sgpio2@102000 {
compatible = "nuvoton,npcm845-sgpio";
reg = <0x102000 0x200>;
pinctrl-names = "default";
pinctrl-0 = <&iox2_pins>;
syscon-rst = <&rstc>;
#address-cells = <1>;
#size-cells = <0>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "gpio9";
nuvoton,input-ngpios = <8>;
nuvoton,output-ngpios = <8>;
};
rng: rng@b000 {
compatible = "nuvoton,npcm845-rng";
reg = <0xb000 0x8>;
@@ -544,14 +574,6 @@
groups = "spi0cs1";
function = "spi0cs1";
};
spi0cs2_pins: spi0cs2-pins {
groups = "spi0cs2";
function = "spi0cs2";
};
spi0cs3_pins: spi0cs3-pins {
groups = "spi0cs3";
function = "spi0cs3";
};
smb3c_pins: smb3c-pins {
groups = "smb3c";
function = "smb3c";
@@ -1060,5 +1082,13 @@
groups = "vcdhs";
function = "vcdhs";
};
smb11ddcm_pins: smb11ddcm-pins {
groups = "smb11ddcm";
function = "smb11ddcm";
};
smb11ddcs_pins: smb11ddcs-pins {
groups = "smb11ddcs";
function = "smb11ddcs";
};
};
};

8
drivers/gpio/npcm_sgpio.c
View File

@@ -301,7 +301,7 @@ static bool is_gpio_persist(struct udevice *dev)
status = npcm_get_reset_status();
if (status & PORST)
return false;
return true;
if (status & CORST)
regmap_read(priv->rst_regmap, CORSTC, &val);
else if (status & WD0RST)
@@ -320,9 +320,9 @@ static bool is_gpio_persist(struct udevice *dev)
regmap_read(priv->rst_regmap, TIPRSTC, &val);
if (priv->siox_num == 1)
return (val && BIT(NPCM_SIOX2));
return !!(val & BIT(NPCM_SIOX2));
else
return (val && BIT(NPCM_SIOX1));
return !!(val & BIT(NPCM_SIOX1));
}
static const struct dm_gpio_ops npcm_sgpio_ops = {
@@ -363,7 +363,7 @@ static int npcm_sgpio_probe(struct udevice *dev)
uc_priv->gpio_count = priv->nin_sgpio + priv->nout_sgpio;
uc_priv->bank_name = dev->name;
if (is_gpio_persist(dev)) {
if (!is_gpio_persist(dev)) {
ofnode_for_each_subnode(node, dev_ofnode(dev)) {
if (ofnode_read_bool(node, "persist-enable")) {
rc = ofnode_read_u32_array(node, "gpios", val, 2);

6
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
View File

@@ -166,6 +166,8 @@ struct npcm8xx_pinctrl_priv {
213, 214, 215) \
FUNC(spix, MFSEL4, 27, 224, 225, 226, 227, 229, 230) \
FUNC(spixcs1, MFSEL4, 28, 228) \
FUNC(smb11ddcm, MFSEL4, 29) \
FUNC(smb11ddcs, MFSEL4, 30) \
FUNC(spi1cs1, MFSEL5, 0, 233) \
FUNC(jm2, MFSEL5, 1) \
FUNC(j2j3, MFSEL5, 2, 44, 62, 45, 46) \
@@ -570,9 +572,9 @@ static const struct pin_info npcm8xx_pins[] = {
{189, "GPIO189/SPI3_D3/SPI3_nCS3", {FN_spi3quad, FN_spi3cs3, FN_gpio1889}, 3,
DS(8, 12) | SLEW | GPIO_ALT | GPIO_IDX(2)},
{190, "GPIO190/nPRD_SMI", {FN_nprd_smi}, 1, DS(2, 4)},
{191, "GPIO191/SPI1_D1/FANIN17/FM1_D1/STRAP10",
{191, "GPIO191/SPI1_D2/SPI1_nCS2/FM1_D2/SMB15B_SDA",
{FN_spi1d23, FN_spi1cs2, FN_fm1, FN_smb15}, 4, SLEW},
{192, "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15_SCL",
{192, "GPIO192/SPI1_D3/SPI_nCS3/FM1_D3/SMB15B_SCL",
{FN_spi1d23, FN_spi1cs3, FN_fm1, FN_smb15}, 4, SLEW},
{193, "GPIO193/R1_CRSDV", {FN_r1}, 1, 0},
{194, "GPIO194/SMB0B_SCL/FM0_CK", {FN_smb0b, FN_fm0}, 2, SLEW},

23
drivers/watchdog/npcm_wdt.c
View File

@@ -27,26 +27,11 @@ struct npcm_wdt_priv {
static int npcm_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
{
struct npcm_wdt_priv *priv = dev_get_priv(dev);
u32 time_out, val;
u32 val;
time_out = (u32)(timeout_ms) / 1000;
if (time_out < 2)
val = 0x800;
else if (time_out < 3)
val = 0x420;
else if (time_out < 6)
val = 0x810;
else if (time_out < 11)
val = 0x430;
else if (time_out < 22)
val = 0x820;
else if (time_out < 44)
val = 0xc00;
else if (time_out < 87)
val = 0x830;
else if (time_out < 173)
val = 0xc10;
else if (time_out < 688)
if (timeout_ms < 343552)
val = ((timeout_ms / 1342) << 16) + 0x800;
else if (timeout_ms < 688000)
val = 0xc20;
else
val = 0xc30;