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Merge tag 'i2c-dm-updates-for-v2024-10-next' of https://source.denx.de/u-boot/custodians/u-boot-i2c into next

Browse Source 
i2c DM updates for v2024.10 next

- Add series from Simon, which removes old content in i2c.h
  so that we can move towards having just the dm API.

  It does not remove any boards, but instead removes functionality.
This commit is contained in:
Tom Rini
2024-08-13 10:09:45 -06:00
parent f4f845b859 710b9c89f2
commit 638ecd85b3
35 changed files with 7 additions and 412 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
README
View File

@@ -771,21 +771,8 @@ The following options need to be configured:
CFG_SYS_NUM_I2C_BUSES
Hold the number of i2c buses you want to use.
CFG_SYS_I2C_DIRECT_BUS
define this, if you don't use i2c muxes on your hardware.
if CFG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
omit this define.
CFG_SYS_I2C_MAX_HOPS
define how many muxes are maximal consecutively connected
on one i2c bus. If you not use i2c muxes, omit this
define.
CFG_SYS_I2C_BUSES
hold a list of buses you want to use, only used if
CFG_SYS_I2C_DIRECT_BUS is not defined, for example
a board with CFG_SYS_I2C_MAX_HOPS = 1 and
CFG_SYS_NUM_I2C_BUSES = 9:
hold a list of buses you want to use
CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
{0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
@@ -883,13 +870,6 @@ The following options need to be configured:
You should define these to the GPIO value as given directly to
the generic GPIO functions.
CFG_I2C_MULTI_BUS
This option allows the use of multiple I2C buses, each of which
must have a controller. At any point in time, only one bus is
active. To switch to a different bus, use the 'i2c dev' command.
Note that bus numbering is zero-based.
CFG_SYS_I2C_NOPROBES
This option specifies a list of I2C devices that will be skipped
@@ -900,11 +880,6 @@ The following options need to be configured:
will skip addresses 0x50 and 0x68 on a board with one I2C bus
CFG_SYS_RTC_BUS_NUM
If defined, then this indicates the I2C bus number for the RTC.
If not defined, then U-Boot assumes that RTC is on I2C bus 0.
CONFIG_SOFT_I2C_READ_REPEATED_START
defining this will force the i2c_read() function in

7
arch/mips/mach-octeon/octeon_fdt.c
View File

@@ -687,13 +687,6 @@ int octeon_fdt_i2c_get_bus(const void *fdt, int node_offset)
while (node_offset > 0 &&
!(found = !fdt_node_check_compatible(fdt, node_offset, compat))) {
node_offset = fdt_parent_offset(fdt, node_offset);
#ifdef CONFIG_OCTEON_I2C_FDT
bus = i2c_get_bus_num_fdt(node_offset);
if (bus >= 0) {
debug("%s: Found bus 0x%x\n", __func__, bus);
return bus;
}
#endif
}
if (!found) {
printf("Error: node %d in device tree is not a child of the I2C bus\n",

32
cmd/date.c
View File

@@ -31,7 +31,6 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
int old_bus __maybe_unused;
/* switch to correct I2C bus */
#ifdef CONFIG_DM_RTC
struct udevice *dev;
rcode = uclass_get_device_by_seq(UCLASS_RTC, 0, &dev);
@@ -42,35 +41,19 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
return CMD_RET_FAILURE;
}
}
#elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
old_bus = i2c_get_bus_num();
i2c_set_bus_num(CFG_SYS_RTC_BUS_NUM);
#else
old_bus = I2C_GET_BUS();
I2C_SET_BUS(CFG_SYS_RTC_BUS_NUM);
#endif
switch (argc) {
case 2: /* set date & time */
if (strcmp(argv[1],"reset") == 0) {
puts ("Reset RTC...\n");
#ifdef CONFIG_DM_RTC
rcode = dm_rtc_reset(dev);
if (!rcode)
rcode = dm_rtc_set(dev, &default_tm);
#else
rtc_reset();
rcode = rtc_set(&default_tm);
#endif
if (rcode)
puts("## Failed to set date after RTC reset\n");
} else {
/* initialize tm with current time */
#ifdef CONFIG_DM_RTC
rcode = dm_rtc_get(dev, &tm);
#else
rcode = rtc_get(&tm);
#endif
if (!rcode) {
/* insert new date & time */
if (mk_date(argv[1], &tm) != 0) {
@@ -78,11 +61,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
break;
}
/* and write to RTC */
#ifdef CONFIG_DM_RTC
rcode = dm_rtc_set(dev, &tm);
#else
rcode = rtc_set(&tm);
#endif
if (rcode) {
printf("## Set date failed: err=%d\n",
rcode);
@@ -93,11 +72,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
}
fallthrough;
case 1: /* get date & time */
#ifdef CONFIG_DM_RTC
rcode = dm_rtc_get(dev, &tm);
#else
rcode = rtc_get(&tm);
#endif
if (rcode) {
puts("## Get date failed\n");
break;
@@ -114,13 +89,6 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
rcode = CMD_RET_USAGE;
}
/* switch back to original I2C bus */
#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
i2c_set_bus_num(old_bus);
#elif !defined(CONFIG_DM_RTC)
I2C_SET_BUS(old_bus);
#endif
return rcode ? CMD_RET_FAILURE : 0;
}

23
cmd/i2c.c
View File

@@ -1698,18 +1698,6 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
for (i = 0; i < CFG_SYS_NUM_I2C_BUSES; i++) {
printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
#ifndef CFG_SYS_I2C_DIRECT_BUS
int j;
for (j = 0; j < CFG_SYS_I2C_MAX_HOPS; j++) {
if (i2c_bus[i].next_hop[j].chip == 0)
break;
printf("->%s@0x%2x:%d",
i2c_bus[i].next_hop[j].mux.name,
i2c_bus[i].next_hop[j].chip,
i2c_bus[i].next_hop[j].channel);
}
#endif
printf("\n");
}
#endif
@@ -1734,17 +1722,6 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
return -1;
}
printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
#ifndef CFG_SYS_I2C_DIRECT_BUS
int j;
for (j = 0; j < CFG_SYS_I2C_MAX_HOPS; j++) {
if (i2c_bus[i].next_hop[j].chip == 0)
break;
printf("->%s@0x%2x:%d",
i2c_bus[i].next_hop[j].mux.name,
i2c_bus[i].next_hop[j].chip,
i2c_bus[i].next_hop[j].channel);
}
#endif
printf("\n");
#endif
}

1
configs/MPC837XERDB_defconfig
View File

@@ -139,7 +139,6 @@ CONFIG_CMD_USB=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y

1
configs/ethernut5_defconfig
View File

@@ -46,7 +46,6 @@ CONFIG_CMD_SNTP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_BSP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y

1
configs/ls2080aqds_nand_defconfig
View File

@@ -61,7 +61,6 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y

1
configs/ls2080aqds_qspi_defconfig
View File

@@ -43,7 +43,6 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y

1
configs/ls2080ardb_nand_defconfig
View File

@@ -68,7 +68,6 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y

1
configs/malta64_defconfig
View File

@@ -27,7 +27,6 @@ CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_IDE_MAXBUS=1

1
configs/malta64el_defconfig
View File

@@ -29,7 +29,6 @@ CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_IDE_MAXBUS=1

1
configs/malta_defconfig
View File

@@ -26,7 +26,6 @@ CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_IDE_MAXBUS=1

1
configs/maltael_defconfig
View File

@@ -28,7 +28,6 @@ CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
# CONFIG_ISO_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_SYS_IDE_MAXBUS=1

1
configs/mx28evk_defconfig
View File

@@ -32,7 +32,6 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y

1
configs/mx51evk_defconfig
View File

@@ -31,7 +31,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y

1
configs/work_92105_defconfig
View File

@@ -47,7 +47,6 @@ CONFIG_CMD_NAND=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_DOS_PARTITION=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y

10
doc/I2C_Edge_Conditions
View File

@@ -31,12 +31,10 @@ Notes
!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!!
This reset edge condition could possibly be present in every I2C
controller and device available. For boards where a I2C bus reset
function can be implemented a i2c_init_board() function should be
provided and enabled by #define'ing CONFIG_SYS_I2C_INIT_BOARD in your
board's config file. Note that this is NOT necessary when using the
bit-banging I2C driver (common/soft_i2c.c) as this already includes
the I2C bus reset sequence.
controller and device available.
Note that this problem does not happen when using the bit-banging I2C driver
(common/soft_i2c.c) as this already includes the I2C bus reset sequence.
Many thanks to Bill Hunter for finding this serious BUG.

3
drivers/ddr/fsl/main.c
View File

@@ -111,7 +111,7 @@ static int ddr_i2c_read(DEV_TYPE *dev, unsigned int addr,
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, 0, buf, len);
#else
ret = i2c_read(dev->chip, addr, alen, buf, len);
ret = 0;
#endif
return ret;
@@ -162,7 +162,6 @@ static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
};
dev = &ldev;
i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
#endif
#ifdef CONFIG_SYS_FSL_DDR4

141
drivers/i2c/i2c_core.c
View File

@@ -33,137 +33,8 @@ struct i2c_adapter *i2c_get_adapter(int index)
return i2c_adap_p;
}
#if !defined(CFG_SYS_I2C_DIRECT_BUS)
struct i2c_bus_hose i2c_bus[CFG_SYS_NUM_I2C_BUSES] =
CFG_SYS_I2C_BUSES;
#endif
DECLARE_GLOBAL_DATA_PTR;
#ifndef CFG_SYS_I2C_DIRECT_BUS
/*
* i2c_mux_set()
* -------------
*
* This turns on the given channel on I2C multiplexer chip connected to
* a given I2C adapter directly or via other multiplexers. In the latter
* case the entire multiplexer chain must be initialized first starting
* with the one connected directly to the adapter. When disabling a chain
* muxes must be programmed in reverse order, starting with the one
* farthest from the adapter.
*
* mux_id is the multiplexer chip type from defined in i2c.h. So far only
* NXP (Philips) PCA954x multiplexers are supported. Switches are NOT
* supported (anybody uses them?)
*/
static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip,
int channel)
{
uint8_t buf;
int ret;
/* channel < 0 - turn off the mux */
if (channel < 0) {
buf = 0;
ret = adap->write(adap, chip, 0, 0, &buf, 1);
if (ret)
printf("%s: Could not turn off the mux.\n", __func__);
return ret;
}
switch (mux_id) {
case I2C_MUX_PCA9540_ID:
case I2C_MUX_PCA9542_ID:
if (channel > 1)
return -1;
buf = (uint8_t)((channel & 0x01) | (1 << 2));
break;
case I2C_MUX_PCA9544_ID:
if (channel > 3)
return -1;
buf = (uint8_t)((channel & 0x03) | (1 << 2));
break;
case I2C_MUX_PCA9547_ID:
if (channel > 7)
return -1;
buf = (uint8_t)((channel & 0x07) | (1 << 3));
break;
case I2C_MUX_PCA9548_ID:
if (channel > 7)
return -1;
buf = (uint8_t)(0x01 << channel);
break;
default:
printf("%s: wrong mux id: %d\n", __func__, mux_id);
return -1;
}
ret = adap->write(adap, chip, 0, 0, &buf, 1);
if (ret)
printf("%s: could not set mux: id: %d chip: %x channel: %d\n",
__func__, mux_id, chip, channel);
return ret;
}
static int i2c_mux_set_all(void)
{
struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
int i;
/* Connect requested bus if behind muxes */
if (i2c_bus_tmp->next_hop[0].chip != 0) {
/* Set all muxes along the path to that bus */
for (i = 0; i < CFG_SYS_I2C_MAX_HOPS; i++) {
int ret;
if (i2c_bus_tmp->next_hop[i].chip == 0)
break;
ret = i2c_mux_set(I2C_ADAP,
i2c_bus_tmp->next_hop[i].mux.id,
i2c_bus_tmp->next_hop[i].chip,
i2c_bus_tmp->next_hop[i].channel);
if (ret != 0)
return ret;
}
}
return 0;
}
static int i2c_mux_disconnect_all(void)
{
struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
int i;
uint8_t buf = 0;
if (I2C_ADAP->init_done == 0)
return 0;
/* Disconnect current bus (turn off muxes if any) */
if ((i2c_bus_tmp->next_hop[0].chip != 0) &&
(I2C_ADAP->init_done != 0)) {
i = CFG_SYS_I2C_MAX_HOPS;
do {
uint8_t chip;
int ret;
chip = i2c_bus_tmp->next_hop[--i].chip;
if (chip == 0)
continue;
ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1);
if (ret != 0) {
printf("i2c: mux disconnect error\n");
return ret;
}
} while (i > 0);
}
return 0;
}
#endif
/*
* i2c_init_bus():
* ---------------
@@ -237,11 +108,6 @@ int i2c_set_bus_num(unsigned int bus)
if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
return 0;
#ifndef CFG_SYS_I2C_DIRECT_BUS
if (bus >= CFG_SYS_NUM_I2C_BUSES)
return -1;
#endif
max = ll_entry_count(struct i2c_adapter, i2c);
if (I2C_ADAPTER(bus) >= max) {
printf("Error, wrong i2c adapter %d max %d possible\n",
@@ -249,17 +115,10 @@ int i2c_set_bus_num(unsigned int bus)
return -2;
}
#ifndef CFG_SYS_I2C_DIRECT_BUS
i2c_mux_disconnect_all();
#endif
gd->cur_i2c_bus = bus;
if (I2C_ADAP->init_done == 0)
i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr);
#ifndef CFG_SYS_I2C_DIRECT_BUS
i2c_mux_set_all();
#endif
return 0;
}

1
drivers/i2c/mxc_i2c.c
View File

@@ -620,6 +620,7 @@ int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
__attribute__((weak, alias("__enable_i2c_clk")));
#if !CONFIG_IS_ENABLED(DM_I2C)
/*
* Read data from I2C device
*

11
drivers/i2c/soft_i2c.c
View File

@@ -107,16 +107,13 @@ DECLARE_GLOBAL_DATA_PTR;
/*-----------------------------------------------------------------------
* Local functions
*/
#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
static void send_reset (void);
#endif
static void send_start (void);
static void send_stop (void);
static void send_ack (int);
static int write_byte (uchar byte);
static uchar read_byte (int);
#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
/*-----------------------------------------------------------------------
* Send a reset sequence consisting of 9 clocks with the data signal high
* to clock any confused device back into an idle state. Also send a
@@ -144,7 +141,6 @@ static void send_reset(void)
send_stop();
I2C_TRISTATE;
}
#endif
/*-----------------------------------------------------------------------
* START: High -> Low on SDA while SCL is High
@@ -277,12 +273,6 @@ static uchar read_byte(int ack)
*/
static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
{
#if defined(CONFIG_SYS_I2C_INIT_BOARD)
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
i2c_init_board();
#else
/*
* WARNING: Do NOT save speed in a static variable: if the
* I2C routines are called before RAM is initialized (to read
@@ -290,7 +280,6 @@ static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
* system will crash.
*/
send_reset ();
#endif
}
/*-----------------------------------------------------------------------

5
drivers/power/power_i2c.c
View File

@@ -33,8 +33,6 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
p->bus);
return -ENXIO;
}
#else /* Non DM I2C support - will be removed */
I2C_SET_BUS(p->bus);
#endif
switch (pmic_i2c_tx_num) {
@@ -93,9 +91,6 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
return -ENXIO;
}
ret = dm_i2c_read(dev, reg, buf, pmic_i2c_tx_num);
#else /* Non DM I2C support - will be removed */
I2C_SET_BUS(p->bus);
ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
#endif
if (ret)
return ret;

4
drivers/usb/host/ohci-lpc32xx.c
View File

@@ -94,10 +94,6 @@ static int isp1301_set_value(struct udevice *dev, int reg, u8 value)
static void isp1301_configure(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_set_bus_num(I2C_2);
#endif
/*
* LPC32XX only supports DAT_SE0 USB mode
* This sequence is important

3
include/configs/ethernut5.h
View File

@@ -59,9 +59,6 @@
#define CFG_SYS_I2C_RTC_ADDR 0x51
#endif
/* I2C */
#define CFG_SYS_MAX_I2C_BUS 1
#define I2C_SOFT_DECLARATIONS
#define GPIO_I2C_SCL AT91_PIO_PORTA, 24

1
include/configs/ls1028aqds.h
View File

@@ -47,7 +47,6 @@
#endif
/* RTC */
#define CFG_SYS_RTC_BUS_NUM 1
#define I2C_MUX_CH_RTC 0xB
/* Store environment at top of flash */

2
include/configs/ls1028ardb.h
View File

@@ -10,8 +10,6 @@
#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
#define CFG_SYS_RTC_BUS_NUM 0
/* Store environment at top of flash */
/*

1
include/configs/ls1046afrwy.h
View File

@@ -66,7 +66,6 @@
/* RTC */
#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 0 I2C bus 0*/
#define CFG_SYS_RTC_BUS_NUM 0
/*
* Environment

3
include/configs/lx2160aqds.h
View File

@@ -8,9 +8,6 @@
#include "lx2160a_common.h"
/* RTC */
#define CFG_SYS_RTC_BUS_NUM 0
/* MAC/PHY configuration */
/* Initial environment variables */

3
include/configs/lx2160ardb.h
View File

@@ -8,9 +8,6 @@
#include "lx2160a_common.h"
/* RTC */
#define CFG_SYS_RTC_BUS_NUM 4
#if defined(CONFIG_FSL_MC_ENET)
#define AQR113C_PHY_ADDR1 0x0
#define AQR113C_PHY_ADDR2 0x08

3
include/configs/lx2162aqds.h
View File

@@ -10,9 +10,6 @@
/* USB */
/* RTC */
#define CFG_SYS_RTC_BUS_NUM 0
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \

2
include/configs/m53menlo.h
View File

@@ -57,8 +57,6 @@
#define CFG_FEC_MXC_PHYADDR 0x0
#endif
#define CFG_SYS_RTC_BUS_NUM 1 /* I2C2 */
/*
* RTC
*/

14
include/configs/sniper.h
View File

@@ -34,20 +34,6 @@
#define CFG_SYS_SDRAM_BASE 0x80000000
/*
* I2C
*/
#define CFG_I2C_MULTI_BUS
/*
* Input
*/
/*
* SPL
*/
/*
* Serial
*/

3
include/configs/tqma6.h
View File

@@ -26,9 +26,6 @@
#define TQMA6_SPI_FLASH_SECTOR_SIZE SZ_64K
/* I2C Configs */
#define CFG_I2C_MULTI_BUS
#if !defined(CONFIG_DM_PMIC)
#define CFG_POWER_PFUZE100_I2C_ADDR 0x08
#define TQMA6_PFUZE100_I2C_BUS 2

1
include/configs/tqma6_wru4.h
View File

@@ -16,7 +16,6 @@
/* Watchdog */
/* Config on-board RTC */
#define CFG_SYS_RTC_BUS_NUM 2
#define CFG_SYS_I2C_RTC_ADDR 0x68
/* Turn off RTC square-wave output to save battery */

107
include/i2c.h
View File

@@ -645,20 +645,8 @@ void i2c_early_init_f(void);
*/
#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
#if !defined(CFG_SYS_I2C_MAX_HOPS)
/* no muxes used bus = i2c adapters */
#define CFG_SYS_I2C_DIRECT_BUS 1
#define CFG_SYS_I2C_MAX_HOPS 0
#define CFG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
#else
/* we use i2c muxes */
#undef CFG_SYS_I2C_DIRECT_BUS
#endif
/* define the I2C bus number for RTC and DTT if not already done */
#if !defined(CFG_SYS_RTC_BUS_NUM)
#define CFG_SYS_RTC_BUS_NUM 0
#endif
struct i2c_adapter {
void (*init)(struct i2c_adapter *adap, int speed,
@@ -703,48 +691,13 @@ struct i2c_adapter {
struct i2c_adapter *i2c_get_adapter(int index);
#ifndef CFG_SYS_I2C_DIRECT_BUS
struct i2c_mux {
int id;
char name[16];
};
struct i2c_next_hop {
struct i2c_mux mux;
uint8_t chip;
uint8_t channel;
};
struct i2c_bus_hose {
int adapter;
struct i2c_next_hop next_hop[CFG_SYS_I2C_MAX_HOPS];
};
#define I2C_NULL_HOP {{-1, ""}, 0, 0}
extern struct i2c_bus_hose i2c_bus[];
#define I2C_ADAPTER(bus) i2c_bus[bus].adapter
#else
#define I2C_ADAPTER(bus) bus
#endif
#define I2C_BUS gd->cur_i2c_bus
#define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
#define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
#define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
#ifndef CFG_SYS_I2C_DIRECT_BUS
#define I2C_MUX_PCA9540_ID 1
#define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
#define I2C_MUX_PCA9542_ID 2
#define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
#define I2C_MUX_PCA9544_ID 3
#define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
#define I2C_MUX_PCA9547_ID 4
#define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
#define I2C_MUX_PCA9548_ID 5
#define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
#endif
#ifndef I2C_SOFT_DECLARATIONS
# if (defined(CONFIG_AT91RM9200) || \
defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
@@ -938,66 +891,6 @@ int i2c_set_bus_speed(unsigned int);
unsigned int i2c_get_bus_speed(void);
#endif /* CONFIG_SYS_I2C_LEGACY */
/*
* only for backwardcompatibility, should go away if we switched
* completely to new multibus support.
*/
#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CFG_I2C_MULTI_BUS)
# if !defined(CFG_SYS_MAX_I2C_BUS)
# define CFG_SYS_MAX_I2C_BUS 2
# endif
# define I2C_MULTI_BUS 1
#else
# define CFG_SYS_MAX_I2C_BUS 1
# define I2C_MULTI_BUS 0
#endif
/* NOTE: These two functions MUST be always_inline to avoid code growth! */
static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
static inline unsigned int I2C_GET_BUS(void)
{
return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
}
static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
static inline void I2C_SET_BUS(unsigned int bus)
{
if (I2C_MULTI_BUS)
i2c_set_bus_num(bus);
}
/* Multi I2C definitions */
enum {
I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
I2C_8, I2C_9, I2C_10,
};
/**
* Get FDT values for i2c bus.
*
* @param blob Device tree blbo
* Return: the number of I2C bus
*/
void board_i2c_init(const void *blob);
/**
* Find the I2C bus number by given a FDT I2C node.
*
* @param blob Device tree blbo
* @param node FDT I2C node to find
* Return: the number of I2C bus (zero based), or -1 on error
*/
int i2c_get_bus_num_fdt(int node);
/**
* Reset the I2C bus represented by the given a FDT I2C node.
*
* @param blob Device tree blbo
* @param node FDT I2C node to find
* Return: 0 if port was reset, -1 if not found
*/
int i2c_reset_port_fdt(const void *blob, int node);
#endif /* !CONFIG_DM_I2C */
#endif /* _I2C_H_ */