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rockchip: rk35xx: Sort soc u-boot.dtsi alphabetically

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Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes
is sorted by reg addr then by alphabetical order.

This has no intended change beside sorting existing nodes and removing
a duplicated usbdpphy0_grf node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman
2024-04-22 06:28:48 +00:00
committed by Kever Yang
parent 23ec102003
commit 647b8cf0e8
2 changed files with 95 additions and 100 deletions
Download Patch File Download Diff File Expand all files Collapse all files

112
arch/arm/dts/rk356x-u-boot.dtsi
View File

@@ -38,46 +38,21 @@
};
};
&xin24m {
bootph-all;
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
mkimage {
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
offset = <0x8000>;
};
};
};
#endif
&cru {
bootph-all;
};
&pmucru {
bootph-all;
};
&grf {
bootph-all;
};
&pmugrf {
bootph-all;
};
&pinctrl {
bootph-all;
};
&pcfg_pull_none_smt {
bootph-all;
};
&pcfg_pull_none {
bootph-all;
};
&pcfg_pull_up_drv_level_2 {
bootph-all;
};
&pcfg_pull_up {
bootph-all;
};
&emmc_bus8 {
bootph-all;
};
@@ -102,10 +77,51 @@
bootph-all;
};
&grf {
bootph-all;
};
&i2c0_xfer {
bootph-all;
};
&pcfg_pull_none {
bootph-all;
};
&pcfg_pull_none_smt {
bootph-all;
};
&pcfg_pull_up {
bootph-all;
};
&pcfg_pull_up_drv_level_2 {
bootph-all;
};
&pinctrl {
bootph-all;
};
&pmucru {
bootph-all;
};
&pmugrf {
bootph-all;
};
&sdhci {
bootph-pre-ram;
max-frequency = <200000000>;
};
&sdmmc0 {
bootph-pre-ram;
};
&sdmmc0_bus4 {
bootph-all;
};
@@ -126,31 +142,15 @@
bootph-all;
};
&uart2m0_xfer {
bootph-all;
};
&sdhci {
bootph-pre-ram;
max-frequency = <200000000>;
};
&sdmmc0 {
bootph-pre-ram;
};
&uart2 {
bootph-pre-ram;
clock-frequency = <24000000>;
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
mkimage {
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
offset = <0x8000>;
};
};
&uart2m0_xfer {
bootph-all;
};
&xin24m {
bootph-all;
};
#endif

83
arch/arm/dts/rk3588s-u-boot.dtsi
View File

@@ -41,6 +41,17 @@
status = "disabled";
};
vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";
reg = <0x0 0xfd5a6000 0x0 0x2000>;
clocks = <&cru PCLK_VO0GRF>;
};
usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";
reg = <0x0 0xfd5ac000 0x0 0x4000>;
};
usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -72,22 +83,6 @@
};
};
vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";
reg = <0x0 0xfd5a6000 0x0 0x2000>;
clocks = <&cru PCLK_VO0GRF>;
};
usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";
reg = <0x0 0xfd5ac000 0x0 0x4000>;
};
usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5c8000 0x0 0x4000>;
};
rng: rng@fe378000 {
compatible = "rockchip,trngv1";
reg = <0x0 0xfe378000 0x0 0x200>;
@@ -125,6 +120,21 @@
};
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
mkimage {
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
offset = <0x8000>;
};
};
};
#endif
&cru {
bootph-pre-ram;
};
&emmc_bus8 {
bootph-all;
};
@@ -145,32 +155,24 @@
bootph-all;
};
&pinctrl {
bootph-all;
&ioc {
bootph-pre-ram;
};
&pcfg_pull_none {
bootph-all;
};
&pcfg_pull_up_drv_level_2 {
bootph-all;
};
&pcfg_pull_up {
bootph-all;
};
&xin24m {
&pcfg_pull_up_drv_level_2 {
bootph-all;
};
&cru {
bootph-pre-ram;
};
&sys_grf {
bootph-pre-ram;
&pinctrl {
bootph-all;
};
&pmu1grf {
@@ -185,13 +187,13 @@
bootph-pre-ram;
};
&sdmmc {
&sdhci {
bootph-pre-ram;
bootph-some-ram;
u-boot,spl-fifo-mode;
};
&sdhci {
&sdmmc {
bootph-pre-ram;
bootph-some-ram;
u-boot,spl-fifo-mode;
@@ -213,6 +215,10 @@
bootph-all;
};
&sys_grf {
bootph-pre-ram;
};
&uart2 {
bootph-pre-ram;
clock-frequency = <24000000>;
@@ -222,17 +228,6 @@
bootph-all;
};
&ioc {
bootph-pre-ram;
&xin24m {
bootph-all;
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
mkimage {
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
offset = <0x8000>;
};
};
};
#endif