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imx: misc: ele_mu: Update MU TR registers count

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According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All
of them are used for ELE message. So update TR count to 8 and fix a
typo in receive msg

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ye Li
2023-06-15 18:09:12 +08:00
committed by Stefano Babic
parent 859f4e02a8
commit 71a21425d2
1 changed files with 2 additions and 2 deletions
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4
drivers/misc/imx_ele/ele_mu.c
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@@ -22,7 +22,7 @@ struct imx8ulp_mu {
#define MU_SR_TE0_MASK BIT(0)
#define MU_SR_RF0_MASK BIT(0)
#define MU_TR_COUNT 4
#define MU_TR_COUNT 8
#define MU_RR_COUNT 4
void mu_hal_init(ulong base)
@@ -65,7 +65,7 @@ int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg)
u32 val;
int ret;
assert(reg_index < MU_TR_COUNT);
assert(reg_index < MU_RR_COUNT);
debug("receivemsg sr 0x%x\n", readl(&mu_base->sr));