configs: am64x_evm_a53_defconfig: Enable configs for PCI Endpoint mode

TI's AM64x SoC has a single instance of PCIe Controller namely PCIe0
which is a Cadence PCIe Controller. To support PCI Endpoint
functionality with the PCIe0 instance of PCIe, enable the corresponding
configs.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
This commit is contained in:
Hrushikesh Salunke
2025-06-16 22:19:29 +05:30
committed by Tom Rini
parent a4a0edc604
commit 7d70986071

View File

@@ -144,6 +144,8 @@ CONFIG_TI_ICSSG_PRUETH=y
CONFIG_NVME_PCI=y
CONFIG_PCI_CONFIG_HOST_BRIDGE=y
CONFIG_PCIE_CDNS_TI=y
CONFIG_PCI_ENDPOINT=y
CONFIG_PCIE_CDNS_TI_EP=y
CONFIG_PHY=y
CONFIG_SPL_PHY=y
CONFIG_PHY_CADENCE_TORRENT=y