mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
imx943_evk: Enable ENETC1 and ENETC2
With this patch, both ENETC1 and ENETC2 are functional on the i.MX943 EVK board and can be used for networking. Signed-off-by: Alice Guo <alice.guo@nxp.com>
This commit is contained in:
Alice Guo
@@ -5,10 +5,109 @@
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#include "imx943-u-boot.dtsi"
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&enetc1 {
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clocks = <&scmi_clk IMX94_CLK_MAC4>;
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clock-names = "enet_ref_clk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eth3>;
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phy-handle = <ðphy5>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&enetc2 {
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clocks = <&scmi_clk IMX94_CLK_MAC5>;
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clock-names = "enet_ref_clk";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eth4>;
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phy-handle = <ðphy6>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&lpi2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpi2c3>;
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status = "okay";
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pca9548_i2c3: i2c-mux@77 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x77>;
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i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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pcal6416_i2c3_u171: gpio@21 {
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compatible = "nxp,pcal6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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ethphy2-on-hog {
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gpio-hog;
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gpios = <2 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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ethphy3-on-hog {
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gpio-hog;
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gpios = <3 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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ethphy4-on-hog {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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lvds-en-hog {
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gpio-hog;
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gpios = <9 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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};
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};
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};
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};
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&lpuart1 {
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bootph-pre-ram;
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};
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&netc_blk_ctrl {
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assigned-clocks = <&scmi_clk IMX94_CLK_MAC2>,
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<&scmi_clk IMX94_CLK_MAC4>,
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<&scmi_clk IMX94_CLK_MAC5>;
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assigned-clock-parents = <&scmi_clk IMX94_CLK_SYSPLL1_PFD0>,
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<&scmi_clk IMX94_CLK_SYSPLL1_PFD0>,
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<&scmi_clk IMX94_CLK_SYSPLL1_PFD0>;
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assigned-clock-rates = <250000000>, <250000000>, <250000000>;
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status = "okay";
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};
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&netc_emdio {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_emdio>;
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phy-supply = <®_gpy_en>;
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status = "okay";
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ethphy5: ethernet-phy@6 {
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reg = <0x6>;
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realtek,clkout-disable;
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};
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ethphy6: ethernet-phy@7 {
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reg = <0x7>;
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realtek,clkout-disable;
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};
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};
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®_usdhc2_vmmc {
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bootph-pre-ram;
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};
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@@ -58,6 +157,56 @@
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status = "disabled";
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};
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&scmi_iomuxc {
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pinctrl_emdio: emdiogrp {
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fsl,pins = <
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IMX94_PAD_ETH4_MDC_GPIO1__NETC_EMDC 0x57e
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IMX94_PAD_ETH4_MDIO_GPIO2__NETC_EMDIO 0x97e
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>;
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};
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pinctrl_eth3: eth3grp {
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fsl,pins = <
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IMX94_PAD_ETH3_TXD3__NETC_PINMUX_ETH3_TXD3 0x57e
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IMX94_PAD_ETH3_TXD2__NETC_PINMUX_ETH3_TXD2 0x57e
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IMX94_PAD_ETH3_TXD1__NETC_PINMUX_ETH3_TXD1 0x57e
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IMX94_PAD_ETH3_TXD0__NETC_PINMUX_ETH3_TXD0 0x57e
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IMX94_PAD_ETH3_TX_CTL__NETC_PINMUX_ETH3_TX_CTL 0x57e
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IMX94_PAD_ETH3_TX_CLK__NETC_PINMUX_ETH3_TX_CLK 0x5fe
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IMX94_PAD_ETH3_RX_CTL__NETC_PINMUX_ETH3_RX_CTL 0x57e
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IMX94_PAD_ETH3_RX_CLK__NETC_PINMUX_ETH3_RX_CLK 0x5fe
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IMX94_PAD_ETH3_RXD0__NETC_PINMUX_ETH3_RXD0 0x57e
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IMX94_PAD_ETH3_RXD1__NETC_PINMUX_ETH3_RXD1 0x57e
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IMX94_PAD_ETH3_RXD2__NETC_PINMUX_ETH3_RXD2 0x57e
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IMX94_PAD_ETH3_RXD3__NETC_PINMUX_ETH3_RXD3 0x57e
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>;
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};
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pinctrl_eth4: eth4grp {
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fsl,pins = <
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IMX94_PAD_ETH4_TXD3__NETC_PINMUX_ETH4_TXD3 0x57e
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IMX94_PAD_ETH4_TXD2__NETC_PINMUX_ETH4_TXD2 0x57e
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IMX94_PAD_ETH4_TXD1__NETC_PINMUX_ETH4_TXD1 0x57e
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IMX94_PAD_ETH4_TXD0__NETC_PINMUX_ETH4_TXD0 0x57e
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IMX94_PAD_ETH4_TX_CTL__NETC_PINMUX_ETH4_TX_CTL 0x57e
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IMX94_PAD_ETH4_TX_CLK__NETC_PINMUX_ETH4_TX_CLK 0x5fe
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IMX94_PAD_ETH4_RX_CTL__NETC_PINMUX_ETH4_RX_CTL 0x57e
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IMX94_PAD_ETH4_RX_CLK__NETC_PINMUX_ETH4_RX_CLK 0x5fe
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IMX94_PAD_ETH4_RXD0__NETC_PINMUX_ETH4_RXD0 0x57e
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IMX94_PAD_ETH4_RXD1__NETC_PINMUX_ETH4_RXD1 0x57e
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IMX94_PAD_ETH4_RXD2__NETC_PINMUX_ETH4_RXD2 0x57e
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IMX94_PAD_ETH4_RXD3__NETC_PINMUX_ETH4_RXD3 0x57e
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>;
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};
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pinctrl_lpi2c3: lpi2c3grp {
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fsl,pins = <
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IMX94_PAD_GPIO_IO16__LPI2C3_SDA 0x40000b9e
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IMX94_PAD_GPIO_IO17__LPI2C3_SCL 0x40000b9e
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>;
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};
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};
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&pinctrl_reg_usdhc2_vmmc {
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bootph-pre-ram;
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};
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@@ -84,6 +84,25 @@
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};
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};
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reg_gpy_stby: regulator-gpy-stby {
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compatible = "regulator-fixed";
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regulator-name = "gpy-stby";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pcal6416_i2c3_u171 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_gpy_en: regulator-gpy-en {
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compatible = "regulator-fixed";
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regulator-name = "gpy-en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <®_gpy_stby>;
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gpio = <&pcal6416_i2c3_u171 6 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usbphynop: usbphynop {
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compatible = "usb-nop-xceiv";
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clocks = <&scmi_clk IMX94_CLK_HSIO>;
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@@ -260,6 +279,153 @@
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#index-cells = <1>;
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};
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netc_blk_ctrl: system-controller@4ceb0000 {
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compatible = "nxp,imx94-netc-blk-ctrl";
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reg = <0x0 0x4ceb0000 0x0 0x10000>,
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<0x0 0x4cec0000 0x0 0x10000>,
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<0x0 0x4c810000 0x0 0x7C>;
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reg-names = "ierb", "prb", "netcmix";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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power-domains = <&scmi_devpd IMX94_PD_NETC>;
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status = "disabled";
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netc_bus0: pcie@4ca00000 {
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compatible = "pci-host-ecam-generic";
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reg = <0x0 0x4ca00000 0x0 0x100000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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linux,pci-domain = <0>;
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bus-range = <0x0 0x0>;
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/* Switch BAR0 - non-prefetchable memory */
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ranges = <0x02000000 0x0 0x4cc00000 0x0 0x4cc00000 0x0 0x80000
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/* ENETC 3 and Timer 0 BAR0 - non-prefetchable memory */
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0x02000000 0x0 0x4cd40000 0x0 0x4cd40000 0x0 0x60000
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/* Switch and Timer 0 BAR2 - prefetchable memory */
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0x42000000 0x0 0x4ce00000 0x0 0x4ce00000 0x0 0x20000
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/* ENETC 3 VF0-2 BAR0 - non-prefetchable memory */
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0x02000000 0x0 0x4ce50000 0x0 0x4ce50000 0x0 0x30000
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/* ENETC 3 VF0-2 BAR2 - prefetchable memory */
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0x42000000 0x0 0x4ce80000 0x0 0x4ce80000 0x0 0x30000>;
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enetc3: ethernet@0,0 {
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compatible = "pci1131,e110";
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reg = <0x0 0 0 0 0>;
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phy-mode = "internal";
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status = "disabled";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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netc_timer0: ethernet@0,1 {
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compatible = "pci1131,ee02";
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reg = <0x100 0 0 0 0>;
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status = "disabled";
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};
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netc_switch: ethernet-switch@0,2 {
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compatible = "pci1131,eef2", "nxp,imx943-netc-switch";
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reg = <0x200 0 0 0 0>;
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status = "disabled";
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netc_switch_ports: ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* External ports */
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netc_switch_port0: port@0 {
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reg = <0>;
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status = "disabled";
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};
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netc_switch_port1: port@1 {
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reg = <1>;
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status = "disabled";
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};
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netc_switch_port2: port@2 {
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reg = <2>;
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status = "disabled";
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};
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/* Internal port, a.k.a management port */
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netc_switch_port3: port@3 {
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reg = <3>;
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phy-mode = "internal";
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ethernet = <&enetc3>;
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status = "disabled";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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netc_bus1: pcie@4cb00000 {
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compatible = "pci-host-ecam-generic";
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reg = <0x0 0x4cb00000 0x0 0x100000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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linux,pci-domain = <1>;
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bus-range = <0x1 0x1>;
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/* ENETC 0-2 BAR0 - non-prefetchable memory */
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ranges = <0x02000000 0x0 0x4cC80000 0x0 0x4cc80000 0x0 0xc0000
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/* Timer 1-2 and EMDIO BAR0 - non-prefetchable memory */
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0x02000000 0x0 0x4cda0000 0x0 0x4cda0000 0x0 0x60000
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/* Timer 1-2 and EMDIO BAR2 - prefetchable memory */
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0x42000000 0x0 0x4ce20000 0x0 0x4ce20000 0x0 0x30000>;
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enetc0: ethernet@0,0 {
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compatible = "pci1131,e101";
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reg = <0x10000 0 0 0 0>;
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status = "disabled";
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};
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netc_timer1: ethernet@0,1 {
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compatible = "pci1131,ee02";
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reg = <0x10100 0 0 0 0>;
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status = "disabled";
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};
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enetc1: ethernet@8,0 {
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compatible = "pci1131,e101";
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reg = <0x14000 0 0 0 0>;
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status = "disabled";
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};
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enetc2: ethernet@10,0 {
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compatible = "pci1131,e101";
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reg = <0x18000 0 0 0 0>;
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status = "disabled";
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};
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netc_timer2: ethernet@10,1 {
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compatible = "pci1131,ee02";
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reg = <0x18100 0 0 0 0>;
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status = "disabled";
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};
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netc_emdio: mdio@18,0 {
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compatible = "pci1131,ee00";
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reg = <0x1c000 0 0 0 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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};
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elemu1: mailbox@47530000 {
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compatible = "fsl,imx93-mu-s4";
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reg = <0x0 0x47530000 0x0 0x10000>;
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@@ -39,6 +39,7 @@ CONFIG_SYS_CBSIZE=2048
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CONFIG_SYS_PBSIZE=2074
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_PCI_INIT_R=y
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CONFIG_SPL_MAX_SIZE=0x30000
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_LOAD_IMX_CONTAINER=y
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@@ -83,6 +84,8 @@ CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_NOWHERE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SYS_RX_ETH_BUFFER=8
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_REGMAP=y
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@@ -97,9 +100,19 @@ CONFIG_SPL_CLK_SCMI=y
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CONFIG_SPL_FIRMWARE=y
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# CONFIG_SCMI_AGENT_SMCCC is not set
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CONFIG_IMX_RGPIO2P=y
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CONFIG_DM_PCA953X=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_IMX_LPI2C=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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CONFIG_IMX_MU_MBOX=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_USDHC=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_MDIO=y
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CONFIG_FSL_ENETC=y
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CONFIG_PCIE_ECAM_GENERIC=y
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CONFIG_SPL_PHY=y
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CONFIG_SPL_PHY_IMX8MQ_USB=y
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CONFIG_PINCTRL=y
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