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net: fec_mxc: Add ref clock setup support for i.MX8M Mini/Nano/Plus
The FEC ref clock frequency on i.MX8M Mini/Nano/Plus was so far configured via ad-hoc board code. Replace that with DM clock clk_set_rate() instead. This way, the driver claims all its required clock and sets the ref clock rate, without any need of architecture specific register fiddling. Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
committed by
Stefano Babic
parent
f9e950b9bf
commit
80a34e4008
@@ -1196,6 +1196,33 @@ static void fec_gpio_reset(struct fec_priv *priv)
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}
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#endif
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static int fecmxc_set_ref_clk(struct clk *clk_ref, phy_interface_t interface)
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{
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unsigned int freq;
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int ret;
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if (!CONFIG_IS_ENABLED(CLK_CCF))
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return 0;
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if (interface == PHY_INTERFACE_MODE_MII)
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freq = 25000000;
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else if (interface == PHY_INTERFACE_MODE_RMII)
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freq = 50000000;
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else if (interface == PHY_INTERFACE_MODE_RGMII ||
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interface == PHY_INTERFACE_MODE_RGMII_ID ||
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interface == PHY_INTERFACE_MODE_RGMII_RXID ||
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interface == PHY_INTERFACE_MODE_RGMII_TXID)
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freq = 125000000;
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else
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return -EINVAL;
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ret = clk_set_rate(clk_ref, freq);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int fecmxc_probe(struct udevice *dev)
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{
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bool dm_mii_bus = true;
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@@ -1253,6 +1280,11 @@ static int fecmxc_probe(struct udevice *dev)
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ret = clk_get_by_name(dev, "enet_clk_ref", &priv->clk_ref);
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if (!ret) {
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ret = fecmxc_set_ref_clk(&priv->clk_ref,
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pdata->phy_interface);
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if (ret)
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return ret;
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ret = clk_enable(&priv->clk_ref);
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if (ret)
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return ret;
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