board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH

Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.

Also enable the feature by default for PHYCORE_AM62X_R5.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
This commit is contained in:
Garrett Giordano
2024-11-12 12:40:23 -08:00
committed by Tom Rini
parent dcee0ed33b
commit 893ae07cc9
4 changed files with 8 additions and 1 deletions

View File

@@ -42,6 +42,7 @@ config TARGET_PHYCORE_AM62X_R5
select SPL_RAM
select K3_DDRSS
select BINMAN
select PHYTEC_K3_DDR_PATCH
imply SYS_K3_SPL_ATF
config TARGET_VERDIN_AM62_A53

View File

@@ -0,0 +1,5 @@
config PHYTEC_K3_DDR_PATCH
bool "Patch DDR timings on PHYTEC K3 SoMs"
help
Allow to override default DDR timings prior to
DDRSS driver probing.

View File

@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0+
obj-y += board.o
obj-$(CONFIG_K3_DDRSS) += k3_ddrss_patch.o
obj-$(CONFIG_PHYTEC_K3_DDR_PATCH) += k3_ddrss_patch.o

View File

@@ -33,6 +33,7 @@ config SPL_LDSCRIPT
default "arch/arm/mach-omap2/u-boot-spl.lds"
source "board/phytec/common/Kconfig"
source "board/phytec/common/k3/Kconfig"
endif