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Merge patch series "sc5xx: Add complete board support for all ADI SC5xx boards"

Browse Source 
Greg Malysa <malysagreg@gmail.com> says:

This series adds the final pieces to enable mainline U-Boot to build and
boot all Analog Devices SC5xx SoCs and supports the associated carrier
board options. At this point it should be viable for new users for these
platforms to start with the latest version of U-Boot rather than our
vendor fork, however some features (such as OSPI support and falcon
boot) remain unavailable until we are able to unify our implementations
with the mainline implementations.

Link: https://lore.kernel.org/r/20251211080414.5363-1-malysagreg@gmail.com
[trini: Rebuild CI containers to have new tools]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2026-01-23 14:21:28 -06:00
parent 64662b99c0 b0df2df8d4
commit 8de6e8f8a0
57 changed files with 3566 additions and 99 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
.azure-pipelines.yml
View File

@@ -2,7 +2,7 @@ variables:
windows_vm: windows-2022
ubuntu_vm: ubuntu-24.04
macos_vm: macOS-14
ci_runner_image: trini/u-boot-gitlab-ci-runner:noble-20251013-30Nov2025
ci_runner_image: trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026
# Ensure we do a shallow clone
Agent.Source.Git.ShallowFetchDepth: 1
# Add '-u 0' options for Azure pipelines, otherwise we get "permission

2
.gitlab-ci.yml
View File

@@ -19,7 +19,7 @@ workflow:
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:noble-20251013-30Nov2025
image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026
# We run some tests in different order, to catch some failures quicker.
stages:

2
MAINTAINERS
View File

@@ -639,6 +639,7 @@ F: arch/arm/dts/sc5*
F: arch/arm/include/asm/arch-adi/
F: arch/arm/mach-sc5xx/
F: board/adi/
F: configs/sc5*
F: doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml
F: doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml
F: doc/device-tree-bindings/pinctrl/adi,adsp-pinctrl.yaml
@@ -658,6 +659,7 @@ F: drivers/timer/adi_sc5xx_timer.c
F: drivers/usb/musb-new/sc5xx.c
F: drivers/watchdog/adi_wdt.c
F: include/configs/sc5*
F: include/dt-bindings/clock/adi-sc5xx-clock.h
F: include/dt-bindings/pinctrl/adi-adsp.h
F: include/env/adi/

240
arch/arm/dts/sc573-ezkit.dts
View File

@@ -5,9 +5,249 @@
/dts-v1/;
#include "sc5xx.dtsi"
#include "sc57x.dtsi"
/ {
model = "ADI SC573-EZKIT";
compatible = "adi,sc573-ezkit", "adi,sc57x";
};
&i2c0 {
gpio_expander1: mcp23017@21 {
compatible = "microchip,mcp23017";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
eeprom {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-low;
line-name = "eeprom-en";
bootph-pre-ram;
};
uart0-flow-en {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-low;
line-name = "uart0-flow-en";
bootph-pre-ram;
};
mlb {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-low;
line-name = "mlb-en";
bootph-pre-ram;
};
can0 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can0-en";
bootph-pre-ram;
};
can1 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can1-en";
bootph-pre-ram;
};
adau1962 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1962-en";
bootph-pre-ram;
};
adau1979 {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1979-en";
bootph-pre-ram;
};
sd-wp-en {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-low;
line-name = "sd-wp-en";
bootph-pre-ram;
};
spi2flash-cs {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2flash-cs";
bootph-pre-ram;
};
spi2d2-d3 {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2d2-d3-en";
bootph-pre-ram;
};
spdif-opt {
gpio-hog;
gpios = <14 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-optical-en";
bootph-pre-ram;
};
spdif-dig {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-digital-en";
bootph-pre-ram;
};
};
gpio_expander2: mcp23017@22 {
compatible = "microchip,mcp23017";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
pushbutton3 {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pushbutton3-en";
bootph-pre-ram;
};
pushbutton2 {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pushbutton2-en";
bootph-pre-ram;
};
pushbutton1 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pushbutton1-en";
bootph-pre-ram;
};
leds {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-low;
line-name = "leds-en";
bootph-pre-ram;
};
flg0 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-low;
line-name = "flg0_loop";
bootph-pre-ram;
};
flg1 {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-low;
line-name = "flg1_loop";
bootph-pre-ram;
};
flg2 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-low;
line-name = "flg2_loop";
bootph-pre-ram;
};
flg3 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "flg3_loop";
bootph-pre-ram;
};
adau1977 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-low;
line-name = "adau1977_en";
bootph-pre-ram;
};
adau1977_fault_rst {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "adau1977_fault_rst_en";
bootph-pre-ram;
};
thumbwheel {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-low;
line-name = "thumbwheel_oe";
bootph-pre-ram;
};
engine_rpm {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-low;
line-name = "engine_rpm_oe";
bootph-pre-ram;
};
};
};
&eth0 {
snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('A', 5) GPIO_ACTIVE_LOW>;
};
&gpio0 {
emac0_phy_pwdn {
gpio-hog;
output-high;
gpios = <ADI_ADSP_PIN('A', 4) GPIO_ACTIVE_HIGH>;
};
};
&mmc {
status = "okay";
};
&spi2 {
flash1: is25lp512@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lp512";
reg = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
bootph-pre-ram;
};
};

123
arch/arm/dts/sc57x.dtsi
View File

@@ -3,19 +3,134 @@
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include "sc5xx.dtsi"
/ {
gic: interrupt-controller@310b2000 {
compatible = "arm,cortex-a5-gic";
gic: interrupt-controller@310B2000 {
compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x310B2000 0x1000>,
<0x310B4000 0x100>;
};
soc {
mmc: mmc0@31010000 {
compatible = "snps,dw-mshc";
reg = <0x31010000 0x400>;
pinctrl-names = "default";
pinctrl-0 = <&mmc_default>;
bus-width = <4>;
fifo-depth = <128>;
clock-names = "biu", "ciu";
max-frequency = <52000000>;
status = "disabled";
};
usb0: musb@310c1000 {
compatible = "adi,sc5xx-musb";
reg = <0x310c1000 0x390>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc", "dma";
status = "okay";
};
};
};
&timer0 {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};
&pinctrl0 {
mmc_default: mmc_pins {
adi,pins = <ADI_ADSP_PIN('E', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('E', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('E', 14) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('E', 15) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 0) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 1) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 3) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 7) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('C', 12) ADI_ADSP_PINFUNC_ALT1>;
};
eth0_default: eth0_pins {
adi,pins = <ADI_ADSP_PIN('B', 7) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 8) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 6) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 5) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 14) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 15) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 9) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 0) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 11) ADI_ADSP_PINFUNC_ALT0>;
};
uart0_default: uart0_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('F', 8) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 9) ADI_ADSP_PINFUNC_ALT0>;
};
spi2_default: spi2_pins {
adi,pins = <ADI_ADSP_PIN('B', 14) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 11) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('B', 15) ADI_ADSP_PINFUNC_ALT0>;
};
};
&pinctrl0 {
adi,npins = <92>;
};
&gpio0 {
adi,ngpios = <92>;
};
&clk {
compatible = "adi,sc57x-clocks";
};
&uart0 {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};
&spi2 {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK1>;
reg = <0x31044000 0x1000>;
};
&wdog {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};
&eth0 {
reg = <0x3100C000 0x1000>;
};
&mmc {
clocks = <&dummy>, <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};
&i2c0 {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};
&i2c1 {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};
&i2c2 {
clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
};

230
arch/arm/dts/sc584-ezkit.dts
View File

@@ -11,3 +11,233 @@
model = "ADI SC584-EZKIT";
compatible = "adi,sc584-ezkit", "adi,sc58x";
};
&i2c2 {
gpio_expander1: mcp23017@21 {
compatible = "microchip,mcp23017";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
eeprom {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-low;
line-name = "eeprom-en";
bootph-pre-ram;
};
uart0-flow-en {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-low;
line-name = "uart0-flow-en";
bootph-pre-ram;
};
uart0-en {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-high;
line-name = "uart0-en";
bootph-pre-ram;
};
mlb {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-low;
line-name = "mlb-en";
bootph-pre-ram;
};
can0 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can0-en";
bootph-pre-ram;
};
can1 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can1-en";
bootph-pre-ram;
};
adau1962 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1962-en";
bootph-pre-ram;
};
adau1979 {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1979-en";
bootph-pre-ram;
};
audio_jack_sel {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "audio_jack_sel";
bootph-pre-ram;
};
spi2d2-d3 {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2d2-d3-en";
bootph-pre-ram;
};
spi2flash-cs {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2flash-cs";
bootph-pre-ram;
};
spdif-opt {
gpio-hog;
gpios = <14 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-optical-en";
bootph-pre-ram;
};
spdif-dig {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-digital-en";
bootph-pre-ram;
};
};
gpio_expander2: mcp23017@22 {
compatible = "microchip,mcp23017";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
pushbutton3 {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pushbutton3-en";
bootph-pre-ram;
};
pushbutton2 {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pushbutton2-en";
bootph-pre-ram;
};
pushbutton1 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pushbutton1-en";
bootph-pre-ram;
};
leds {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "leds-en";
bootph-pre-ram;
};
flg0 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
line-name = "flg0_loop";
bootph-pre-ram;
};
flg1 {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-high;
line-name = "flg1_loop";
bootph-pre-ram;
};
flg2 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-high;
line-name = "flg2_loop";
bootph-pre-ram;
};
flg3 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-high;
line-name = "flg3_loop";
bootph-pre-ram;
};
adau1977 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1977_en";
bootph-pre-ram;
};
adau1977_fault_rst {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "adau1977_fault_rst_en";
bootph-pre-ram;
};
thumbwheel {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-high;
line-name = "thumbwheel_oe";
bootph-pre-ram;
};
engine_rpm {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-high;
line-name = "engine_rpm_oe";
bootph-pre-ram;
};
};
};
&eth0 {
snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('B', 14) GPIO_ACTIVE_LOW>;
};
&gpio0 {
emac0_phy_pwdn {
gpio-hog;
output-high;
gpios = <ADI_ADSP_PIN('C', 15) GPIO_ACTIVE_HIGH>;
};
};

198
arch/arm/dts/sc589-ezkit.dts
View File

@@ -8,6 +8,204 @@
#include "sc58x.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ADI SC589-EZKIT";
compatible = "adi,sc589-ezkit", "adi,sc58x";
};
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
gpio_expander1: mcp23017@21 {
compatible = "microchip,mcp23017";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
eeprom {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-low;
line-name = "eeprom-en";
bootph-pre-ram;
};
uart0-flow-en {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-low;
line-name = "uart0-flow-en";
bootph-pre-ram;
};
uart0-en {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-high;
line-name = "uart0-en";
bootph-pre-ram;
};
eth0 {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eth0-en";
bootph-pre-ram;
};
eth1 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eth1-en";
bootph-pre-ram;
};
mlb {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-low;
line-name = "mlb-en";
bootph-pre-ram;
};
can0 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can0-en";
bootph-pre-ram;
};
can1 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can1-en";
bootph-pre-ram;
};
adau1962 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1962-en";
bootph-pre-ram;
};
adau1979 {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1979-en";
bootph-pre-ram;
};
sd_wp {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-low;
line-name = "sd-wp-en";
bootph-pre-ram;
};
spi2d2-d3 {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2d2-d3-en";
bootph-pre-ram;
};
spi2flash-cs {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2flash-cs";
bootph-pre-ram;
};
spdif-opt {
gpio-hog;
gpios = <14 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-optical-en";
bootph-pre-ram;
};
spdif-dig {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-digital-en";
bootph-pre-ram;
};
};
gpio_expander2: mcp23017@22 {
compatible = "microchip,mcp23017";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
pushbutton1 {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pushbutton1-en";
bootph-pre-ram;
};
pushbutton2 {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pushbutton2-en";
bootph-pre-ram;
};
led10 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led10-en";
bootph-pre-ram;
};
led11 {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led11-en";
bootph-pre-ram;
};
led12 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led12-en";
bootph-pre-ram;
};
};
};
&eth0 {
snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('B', 14) GPIO_ACTIVE_LOW>;
};
&gpio0 {
emac0_phy_pwdn {
gpio-hog;
output-high;
gpios = <ADI_ADSP_PIN('C', 15) GPIO_ACTIVE_HIGH>;
};
};
&mmc {
status = "okay";
};

18
arch/arm/dts/sc589-mini.dts
View File

@@ -8,6 +8,22 @@
#include "sc58x.dtsi"
/ {
model = "ADI SC598-MINI";
model = "ADI SC589-MINI";
compatible = "adi,sc589-mini", "adi,sc58x";
};
&eth0 {
snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('B', 7) GPIO_ACTIVE_LOW>;
};
&gpio0 {
emac0_phy_pwdn {
gpio-hog;
output-high;
gpios = <ADI_ADSP_PIN('F', 6) GPIO_ACTIVE_HIGH>;
};
};
&mmc {
status = "okay";
};

164
arch/arm/dts/sc58x.dtsi
View File

@@ -6,18 +6,176 @@
#include "sc5xx.dtsi"
/ {
gic: interrupt-controller@310b2000 {
compatible = "arm,cortex-a5-gic";
gic: interrupt-controller@310B2000 {
compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x310B2000 0x1000>,
<0x310B4000 0x100>;
};
soc {
rcu: rcu@0x3108B000 {
compatible = "adi,reset-controller";
reg = <0x3108B000 0x1000>;
adi,sharc-min = <1>;
adi,sharc-max = <2>;
adi,enable-reboot;
status = "disabled";
};
mmc: mmc0@31010000 {
compatible = "snps,dw-mshc";
reg = <0x31010000 0x400>;
pinctrl-names = "default";
pinctrl-0 = <&mmc_default>;
bus-width = <4>;
fifo-depth = <128>;
clock-names = "biu", "ciu";
max-frequency = <52000000>;
status = "disabled";
};
usb0: musb@310c1000 {
compatible = "adi,sc5xx-musb";
reg = <0x310c1000 0x390>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc", "dma";
status = "okay";
};
usb1: musb@310c2000 {
compatible = "adi,sc5xx-musb";
reg = <0x310c2000 0x390>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc", "dma";
status = "disabled";
};
sharc1: sharc@0x28240000 {
compatible = "adi,sc5xx-rproc";
reg = <0x28240000 0x100>;
coreid = <1>;
adi,rcu = <&rcu>;
status = "disabled";
};
sharc2: sharc@0x28a40000 {
compatible = "adi,sc5xx-rproc";
reg = <0x28a40000 0x100>;
coreid = <2>;
adi,rcu = <&rcu>;
status = "disabled";
};
};
};
&timer0 {
reg = <0x31001004 0x100>,
<0x31001060 0x100>;
<0x31001060 0x100>;
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};
&pinctrl0 {
mmc_default: mmc_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('F', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 3) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 5) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 11) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 12) ADI_ADSP_PINFUNC_ALT0>;
};
eth0_default: eth0_pins {
adi,pins = <ADI_ADSP_PIN('A', 0) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 1) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 3) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 5) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 6) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 7) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 8) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 9) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 11) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 13) ADI_ADSP_PINFUNC_ALT0>;
};
uart0_default: uart0_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('C', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 14) ADI_ADSP_PINFUNC_ALT0>;
};
spi2_default: spi2_pins {
adi,pins = <ADI_ADSP_PIN('C', 1) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 3) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 5) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 6) ADI_ADSP_PINFUNC_ALT0>;
};
};
&pinctrl0 {
adi,npins = <102>;
};
&gpio0 {
adi,ngpios = <102>;
};
&clk {
compatible = "adi,sc58x-clocks";
};
&uart0 {
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};
&spi2 {
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK1>;
reg = <0x31044000 0x1000>;
flash1: is25lp512@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lp512";
reg = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
bootph-pre-ram;
};
};
&wdog {
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};
&eth0 {
reg = <0x3100C000 0x1000>;
};
&mmc {
clocks = <&dummy>, <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};
&i2c0 {
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};
&i2c1 {
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};
&i2c2 {
clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>;
};

126
arch/arm/dts/sc594-som-ezkit.dts
View File

@@ -11,3 +11,129 @@
model = "ADI SC594-SOM-EZKIT";
compatible = "adi,sc594-som-ezkit", "adi,sc59x";
};
&i2c2 {
gpio_expander2: mcp23017@22 {
compatible = "microchip,mcp23017";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
eeprom {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "eeprom-en";
bootph-pre-ram;
};
pushbutton {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "pushbutton-en";
bootph-pre-ram;
};
microsd {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-low;
line-name = "microsd-spi";
bootph-pre-ram;
};
adau-reset {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-low;
line-name = "adau-reset";
bootph-pre-ram;
};
adau1962 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1962-en";
bootph-pre-ram;
};
adau1979 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1979-en";
bootph-pre-ram;
};
octal {
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "octal-spi-cs-en";
bootph-pre-ram;
};
spdif-dig {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-digital-en";
bootph-pre-ram;
};
spdif-opt {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-optical-en";
bootph-pre-ram;
};
audio-jack {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "audio-jack-sel";
bootph-pre-ram;
};
mlb {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-low;
line-name = "mlb-en";
bootph-pre-ram;
};
eth1 {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eth1-en";
bootph-pre-ram;
};
eth1-reset {
gpio-hog;
gpios = <14 GPIO_ACTIVE_LOW>;
/*
* USB0 lines are shared with Eth1 so Eth PHY must be held in reset
* when using the USB
*/
output-high;
line-name = "eth1-reset";
bootph-pre-ram;
};
gige-reset {
gpio-hog;
gpios = <15 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gige-reset";
bootph-pre-ram;
};
};
};

83
arch/arm/dts/sc594-som-ezlite.dts
View File

@@ -11,3 +11,86 @@
model = "ADI SC594-SOM-EZLITE";
compatible = "adi,sc594-som-ezlite", "adi,sc59x";
};
&i2c2 {
gpio_expander: adp5588@30 {
compatible = "adi,adp5588";
reg = <0x30>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
usb-spi0 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb_spi0_en";
bootph-pre-ram;
};
usb-spi1 {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb_spi1_en";
bootph-pre-ram;
};
usb-qspi-en {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb_qspi_en";
bootph-pre-ram;
};
usb-qspi-reset {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-high;
line-name = "usb_qspi_reset";
bootph-pre-ram;
};
eth0-reset {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eth0-reset";
bootph-pre-ram;
};
adau1372-pwrdwn {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1372_pwrdwn";
bootph-pre-ram;
};
led1 {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led1-en";
bootph-pre-ram;
};
led2 {
gpio-hog;
gpios = <16 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led2-en";
bootph-pre-ram;
};
led3 {
gpio-hog;
gpios = <17 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led3-en";
bootph-pre-ram;
};
};
};

193
arch/arm/dts/sc594-som.dtsi
View File

@@ -6,14 +6,201 @@
/dts-v1/;
#include "sc5xx.dtsi"
#include "sc59x.dtsi"
/{
gic: interrupt-controller@310B2000 {
compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x310B2000 0x1000>,
<0x310B4000 0x100>;
};
};
&timer0 {
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
};
&pinctrl0 {
soc_defaults: soc_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('A', 14) ADI_ADSP_PINFUNC_ALT0>, /* i2c */
<ADI_ADSP_PIN('A', 15) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 2) ADI_ADSP_PINFUNC_ALT0>, /* emmc */
<ADI_ADSP_PIN('F', 3) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 5) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 6) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 7) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 8) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 9) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 11) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 12) ADI_ADSP_PINFUNC_ALT0>;
};
ospi_default: ospi_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('C', 8) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 9) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 11) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 14) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('C', 15) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('D', 0) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('D', 1) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('D', 4) ADI_ADSP_PINFUNC_ALT2>;
};
};
&clk {
compatible = "adi,sc594-clocks";
reg = <0x3108d000 0x1000>,
<0x3108e000 0x1000>,
<0x3108f000 0x1000>;
};
&uart0 {
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
};
&wdog {
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
};
&i2c0 {
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
};
&i2c1 {
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
};
&i2c2 {
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
som_gpio_expander: mcp23017@21 {
compatible = "microchip,mcp23017";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
led1 {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "led1-en";
bootph-pre-ram;
};
led2 {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "led2-en";
bootph-pre-ram;
};
led3 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "led3-en";
bootph-pre-ram;
};
spi2flash-cs {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2flash-cs";
bootph-pre-ram;
};
spi2d2-d3 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2d2-d3-en";
bootph-pre-ram;
};
uart0 {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
output-high;
line-name = "uart0-en";
bootph-pre-ram;
};
uart0-flow-en {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-low;
line-name = "uart0-flow-en";
bootph-pre-ram;
};
ospiflash-cs {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-high;
line-name = "ospiflash-cs";
bootph-pre-ram;
};
};
};
&ospi {
status = "okay";
clocks = <&clk ADSP_SC594_CLK_OSPI>;
flash0: is25lx256@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lx256";
reg = <0>;
spi-max-frequency = <100000000>;
cdns,spi-calib-frequency = <10000000>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
bootph-pre-ram;
cdns,phy;
};
};
&spi2 {
clocks = <&clk ADSP_SC594_CLK_SPI>;
flash1: is25lp512@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lp512";
reg = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
bootph-pre-ram;
};
};
&usb0_phy {
status = "okay";
clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>;
clock-names = "sclk0";
};
&usb0 {
status = "okay";
};

168
arch/arm/dts/sc598-som-ezkit.dts
View File

@@ -5,9 +5,175 @@
/dts-v1/;
#include "sc598-som.dtsi"
#include "sc598-som-revE.dtsi"
/ {
model = "ADI SC598-SOM-EZKIT";
compatible = "adi,sc598-som-ezkit", "adi,sc59x-64";
};
&i2c2 {
gpio_expander2: mcp23017@22 {
compatible = "microchip,mcp23017";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
eeprom {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eeprom-en";
bootph-pre-ram;
};
pushbutton {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-high;
line-name = "pushbutton-en";
bootph-pre-ram;
};
microsd {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-low;
line-name = "microsd-spi";
bootph-pre-ram;
};
ftdi {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "ftdi-usb-en";
bootph-pre-ram;
};
can {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-low;
line-name = "can-en";
bootph-pre-ram;
};
adau1962 {
gpio-hog;
gpios = <6 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1962-en";
bootph-pre-ram;
};
adau1979 {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1979-en";
bootph-pre-ram;
};
octal {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-high;
line-name = "octal-spi-cs-en";
bootph-pre-ram;
};
spdif-dig {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-digital-en";
bootph-pre-ram;
};
spdif-opt {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-low;
line-name = "spdif-optical-en";
bootph-pre-ram;
};
audio-jack {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "audio-jack-sel";
bootph-pre-ram;
};
mlb {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-low;
line-name = "mlb-en";
bootph-pre-ram;
};
eth1 {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eth1-en";
bootph-pre-ram;
};
eth1-reset {
gpio-hog;
gpios = <14 GPIO_ACTIVE_LOW>;
/*
* USB0 lines are shared with Eth1 so Eth PHY must be held in reset
* when using the USB
*/
output-high;
line-name = "eth1-reset";
bootph-pre-ram;
};
gige-reset {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-high;
line-name = "gige-reset";
bootph-pre-ram;
};
};
};
&ospi {
status = "okay";
clocks = <&clk ADSP_SC598_CLK_OSPI_REFCLK>;
flash0: mx66lm1g45@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "mx66lm1g45";
reg = <0>;
/*
* This is board dependent to some extent. We've been able to
*set it higher on some boards
*/
spi-max-frequency = <66666666>;
cdns,spi-calib-frequency = <10000000>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
tshsl-ns = <50>;
tsd2d-ns = <50>;
tchsh-ns = <4>;
tslch-ns = <4>;
bootph-pre-ram;
cdns,dqs;
cdns,phy;
};
};

84
arch/arm/dts/sc598-som-ezlite.dts
View File

@@ -5,9 +5,91 @@
/dts-v1/;
#include "sc598-som.dtsi"
#include "sc598-som-revD.dtsi"
/ {
model = "ADI SC598-SOM-EZLITE";
compatible = "adi,sc598-som-ezlite", "adi,sc59x-64";
};
&i2c2 {
gpio_expander: adp5588@30 {
compatible = "adi,adp5588";
reg = <0x30>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
usb-spi0 {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb_spi0_en";
bootph-pre-ram;
};
usb-spi1 {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb_spi1_en";
bootph-pre-ram;
};
usb-qspi-en {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb_qspi_en";
bootph-pre-ram;
};
usb-qspi-reset {
gpio-hog;
gpios = <11 GPIO_ACTIVE_LOW>;
output-high;
line-name = "usb_qspi_reset";
bootph-pre-ram;
};
eth0-reset {
gpio-hog;
gpios = <12 GPIO_ACTIVE_LOW>;
output-high;
line-name = "eth0-reset";
bootph-pre-ram;
};
adau1372-pwrdwn {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
output-high;
line-name = "adau1372_pwrdwn";
bootph-pre-ram;
};
led1 {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led1-en";
bootph-pre-ram;
};
led2 {
gpio-hog;
gpios = <16 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led2-en";
bootph-pre-ram;
};
led3 {
gpio-hog;
gpios = <17 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led3-en";
bootph-pre-ram;
};
};
};

72
arch/arm/dts/sc598-som-revD.dtsi Normal file
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@@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
/dts-v1/;
#include "sc598-som.dtsi"
&i2c2 {
som_gpio_expander: mcp23018@20 {
compatible = "microchip,mcp23018";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
drive-pullups;
led1 {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "led1-en";
bootph-pre-ram;
};
led2 {
gpio-hog;
gpios = <1 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "led2-en";
bootph-pre-ram;
};
led3 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "led3-en";
bootph-pre-ram;
};
spi2d2-d3 {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2d2-d3-en";
bootph-pre-ram;
};
spi2flash-cs {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
output-high;
line-name = "spi2flash-cs";
bootph-pre-ram;
};
};
};
&spi2 {
flash1: is25lp512@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lp512";
reg = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
bootph-pre-ram;
};
};

97
arch/arm/dts/sc598-som-revE.dtsi Normal file
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@@ -0,0 +1,97 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
/dts-v1/;
#include "sc598-som.dtsi"
&i2c2 {
som_gpio_expander: adp5587@34 {
compatible = "adi,adp5587";
reg = <0x34>;
gpio-controller;
#gpio-cells = <2>;
bootph-pre-ram;
uart0 {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
output-high;
line-name = "uart0-en";
bootph-pre-ram;
};
uart0-flow {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-low;
line-name = "uart0-flow-en";
bootph-pre-ram;
};
som-flash-d2d3 {
gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>;
output-high;
line-name = "som-flash-d2d3-en";
};
som-flash-cs {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-high;
line-name = "som-flash-cs-en";
};
som-emmc {
gpio-hog;
gpios = <8 GPIO_ACTIVE_LOW>;
output-high;
line-name = "som-emmc-en";
};
crr-sdcard {
gpio-hog;
gpios = <9 GPIO_ACTIVE_LOW>;
output-low;
line-name = "crr-sdcard-en";
};
led-ds3 {
gpio-hog;
gpios = <15 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led-ds3";
bootph-pre-ram;
};
led-ds2 {
gpio-hog;
gpios = <16 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led-ds2";
};
led-ds1 {
gpio-hog;
gpios = <17 GPIO_ACTIVE_LOW>;
output-high;
line-name = "led-ds1";
};
};
};
&spi2 {
som_flash: is25lp01g@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lp01g";
reg = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
bootph-pre-ram;
};
};

154
arch/arm/dts/sc598-som.dtsi
View File

@@ -6,6 +6,7 @@
/dts-v1/;
#include "sc5xx.dtsi"
#include "sc59x.dtsi"
/ {
gic: interrupt-controller@31200000 {
@@ -15,17 +16,164 @@
reg = <0x31200000 0x40000>, /* GIC Dist */
<0x31240000 0x40000>; /* GICR */
};
soc {
sharc1: sharc@0x28240000 {
compatible = "adi,sc5xx-rproc";
reg = <0x28240000 0x100>;
coreid = <1>;
adi,rcu = <&rcu>;
status = "okay";
};
sharc2: sharc@0x28a40000 {
compatible = "adi,sc5xx-rproc";
reg = <0x28a40000 0x100>;
coreid = <2>;
adi,rcu = <&rcu>;
status = "okay";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
bootph-pre-ram;
emmcclk: emmcclk@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <50000000>; /* 50 MHz */
bootph-pre-ram;
};
};
mmc0: mmc@310C7000 {
compatible = "adi,dwc-sdhci";
reg = <0x310C7000 0x1000>;
interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mmc_defaults>;
clocks = <&emmcclk>;
clock-names = "core";
max-frequency = <50000000>;
bus-width = <8>;
bootph-pre-ram;
};
};
};
&pinctrl0 {
soc_defaults: soc_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('A', 14) ADI_ADSP_PINFUNC_ALT0>, /* i2c */
<ADI_ADSP_PIN('A', 15) ADI_ADSP_PINFUNC_ALT0>;
};
mmc_defaults: mmc_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('D', 15) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('B', 15) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('C', 4) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('C', 6) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('E', 1) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('E', 6) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('E', 8) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('E', 9) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('G', 1) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('G', 2) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('G', 8) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('G', 9) ADI_ADSP_PINFUNC_ALT3>,
<ADI_ADSP_PIN('G', 10) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('I', 6) ADI_ADSP_PINFUNC_ALT1>;
};
ospi_default: ospi_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('A', 0) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 1) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 2) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 3) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 4) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 5) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 6) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('A', 7) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('A', 8) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('A', 9) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('D', 4) ADI_ADSP_PINFUNC_ALT2>;
};
};
&clk {
compatible = "adi,sc598-clocks";
reg = <0x3108d000 0x1000>,
<0x3108e000 0x1000>,
<0x3108f000 0x1000>,
<0x310a9000 0x1000>;
<0x3108e000 0x1000>,
<0x3108f000 0x1000>,
<0x310a9000 0x1000>;
reg-names = "cgu0", "cgu1", "cdu", "pll3";
};
&rcu {
status = "okay";
};
&uart0 {
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
};
&wdog {
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
};
&i2c0 {
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
};
&i2c1 {
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
};
&i2c2 {
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
};
&spi2 {
clocks = <&clk ADSP_SC598_CLK_SPI>;
};
&mmc0 {
status = "okay";
};
&usb0_phy {
status = "okay";
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
clock-names = "sclk0";
};
&usb0 {
status = "okay";
};
&eth0 {
compatible = "adi,sc59x-dwmac-eqos";
reg = <0x31040000 0x10000>;
phy-handle = <&dp83867>;
phy-mode = "rgmii-id";
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
dp83867: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};
&timer0 {
clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>;
};

183
arch/arm/dts/sc59x.dtsi Normal file
View File

@@ -0,0 +1,183 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
/ {
aliases {
spi0 = "/ospi";
};
soc {
rcu: rcu@0x3108C000 {
compatible = "adi,reset-controller";
reg = <0x3108C000 0x1000>;
adi,sharc-min = <1>;
adi,sharc-max = <2>;
status = "disabled";
};
mdma: dma@0x310A7000 {
compatible = "adi,mdma-controller";
reg = <0x310A7000 0x1000>;
status = "okay";
#dma-cells = <1>;
sdma0: channel@8 {
adi,id = <8>;
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "complete", "error", "complete2", "error2";
adi,src-offset = <0>;
adi,dest-offset = <0x80>;
};
};
ospi: ospi {
compatible = "adi,sc59x-ospi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x31027000 0x1000>,
<0x60000000 0x20000000>;
interrupts = <0 151 4>;
dmas = <&mdma 8>, <&mdma 9>;
dma-names = "src", "dst";
/*clocks = <&ospi_clk>;*/
ext-decoder = <0>; /* external decoder */
num-cs = <1>;
fifo-depth = <128>;
pinctrl-names = "default";
pinctrl-0 = <&ospi_default>;
bus-num = <0>;
clock-names = "ospi";
cdns,max-read-delay = <9>;
status = "disabled";
bootph-pre-ram;
};
eth1: eth1 {
compatible = "snps,arc-dwmac-3.70a";
reg = <0x31042000 0x1000>;
phy-mode = "mii";
pinctrl-names = "default";
pinctrl-0 = <&eth1_default>;
};
usb0_phy: usbphy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
reset = <&gpio0 ADI_ADSP_PIN('G', 11) GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb0_default>;
status = "disabled";
};
usb0: usb@310c5000 {
compatible = "snps,dwc2";
dr_mode = "host";
reg = <0x310c5000 0x2000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb0_phy>;
phy-names = "usb2-phy";
pinctrl-names = "default";
pinctrl-0 = <&usb0_default>;
status = "disabled";
};
};
};
&pinctrl0 {
adi,npins = <135>;
pinctrl-names = "default";
pinctrl-0 = <&soc_defaults>;
eth0_default: eth0_pins {
adi,pins = <ADI_ADSP_PIN('H', 3) ADI_ADSP_PINFUNC_ALT0>, /* eth0 */
<ADI_ADSP_PIN('H', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 5) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 6) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 7) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 8) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 9) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 10) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 11) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 14) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('H', 15) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('I', 0) ADI_ADSP_PINFUNC_ALT0>;
};
eth1_default: eth1_pins {
adi,pins = <ADI_ADSP_PIN('E', 11) ADI_ADSP_PINFUNC_ALT0>, /* eth1 */
<ADI_ADSP_PIN('E', 12) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('E', 13) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('E', 14) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('E', 15) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 0) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 1) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('F', 3) ADI_ADSP_PINFUNC_ALT0>;
};
uart0_default: uart0_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('A', 6) ADI_ADSP_PINFUNC_ALT1>,
<ADI_ADSP_PIN('A', 7) ADI_ADSP_PINFUNC_ALT1>;
};
spi2_default: spi2_pins {
bootph-pre-ram;
adi,pins = <ADI_ADSP_PIN('A', 0) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 1) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 2) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 3) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 4) ADI_ADSP_PINFUNC_ALT0>,
<ADI_ADSP_PIN('A', 5) ADI_ADSP_PINFUNC_ALT0>;
};
usb0_default: usb0_pins {
adi,pins = <ADI_ADSP_PIN('F', 3) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 4) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 5) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 6) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 7) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 8) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 9) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 10) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 11) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 12) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 13) ADI_ADSP_PINFUNC_ALT2>,
<ADI_ADSP_PIN('F', 14) ADI_ADSP_PINFUNC_ALT2>;
};
};
&gpio0 {
adi,ngpios = <135>;
pushbutton0 {
gpio-hog;
input;
gpios = <ADI_ADSP_PIN('D', 0) GPIO_ACTIVE_HIGH>;
bootph-pre-ram;
};
pushbutton1 {
gpio-hog;
input;
gpios = <ADI_ADSP_PIN('H', 0) GPIO_ACTIVE_HIGH>;
bootph-pre-ram;
};
};
&spi2 {
reg = <0x31030000 0x1000>;
};
&eth0 {
reg = <0x31040000 0x1000>;
};

191
arch/arm/dts/sc5xx.dtsi
View File

@@ -3,26 +3,89 @@
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/adi-adsp.h>
#include <dt-bindings/clock/adi-sc5xx-clock.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
chosen {
stdout-path = "serial0:115200";
bootph-pre-ram;
};
aliases {
spi2 = "/spi2";
serial0 = &uart0;
bootph-pre-ram;
};
#ifdef CONFIG_SC5XX_USE_BINMAN
binman {
filename = CONFIG_SC5XX_BINMAN_FILENAME;
stage1-boot {
offset = <CONFIG_SC5XX_UBOOT_SPL_OFFSET>;
type = "blob-ext";
filename = "spl/u-boot-spl.ldr";
};
/* since falcon mode can jump from SPL to OS directly
* full u-boot is optional
*
* @todo: review if we can say this given support has
* not yet been upstreamed. Otherwise we might have to
* invoke binman only for full u-boot.
*/
stage2-boot {
offset = <CONFIG_SC5XX_UBOOT_OFFSET>;
type = "blob-ext";
filename = "u-boot.ldr";
optional;
};
#ifdef CONFIG_SC5XX_FITIMAGE_NAME
fitImage {
offset = <CONFIG_SC5XX_FITIMAGE_OFFSET>;
type = "blob-ext";
filename = CONFIG_SC5XX_FITIMAGE_NAME;
};
#endif
#ifdef CONFIG_SC5XX_ROOTFS_NAME
rfs {
offset = <CONFIG_SC5XX_ROOTFS_OFFSET>;
type = "blob-ext";
filename = CONFIG_SC5XX_ROOTFS_NAME;
};
#endif
};
#endif
clocks {
dummy: dummy {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
bootph-pre-ram;
};
sys_clkin0: sys_clkin0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
bootph-all;
bootph-pre-ram;
};
sys_clkin1: sys_clkin1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
bootph-all;
bootph-pre-ram;
};
};
@@ -32,23 +95,127 @@
compatible = "simple-bus";
device_type = "soc";
ranges;
bootph-all;
bootph-pre-ram;
timer0: timer@31018000 {
timer0: timer@0x31018000 {
compatible = "adi,sc5xx-gptimer";
reg = <0x31018004 0x100>,
<0x31018060 0x100>;
<0x31018060 0x100>;
status = "okay";
bootph-all;
bootph-pre-ram;
};
clk: clocks@3108d000 {
reg = <0x3108d000 0x1000>;
#clock-cells = <1>;
clocks = <&sys_clkin0>, <&sys_clkin1>;
clock-names = "sys_clkin0", "sys_clkin1";
pinctrl0: pinctrl@0x31004000 {
compatible = "adi,adsp-pinctrl";
reg = <0x31004000 0x500>;
status = "okay";
bootph-all;
bootph-pre-ram;
};
gpio0: gpio@0x31004000 {
compatible = "adi,adsp-gpio";
reg = <0x31004000 0x500>;
gpio-controller;
#gpio-cells = <2>;
status = "okay";
bootph-pre-ram;
};
clk: clocks@0x3108d000 {
reg = <0x3108d000 0x1000>,
<0x3108e000 0x1000>,
<0x3108f000 0x1000>;
reg-names = "cgu0", "cgu1", "cdu";
#clock-cells = <1>;
clocks = <&dummy>, <&sys_clkin0>, <&sys_clkin1>;
clock-names = "dummy", "sys_clkin0", "sys_clkin1";
status = "okay";
bootph-pre-ram;
};
uart0: serial@0x31003000 {
compatible = "adi,uart4";
reg = <0x31003000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_default>;
clock-names = "sclk0";
status = "okay";
bootph-pre-ram;
};
spi2: spi2 {
compatible = "adi,spi3";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi2_default>;
bus-num = <2>;
spi-max-frequency = <10000000>;
clock-names = "spi";
status = "okay";
bootph-pre-ram;
flash1: is25lp512@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor", "is25lp512";
reg = <1>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
bootph-pre-ram;
};
};
wdog: watchdog@31008000 {
compatible = "adi,wdt";
reg = <0x3108c000 0x1000>,
<0x31089000 0x1000>,
<0x31008000 0x1000>;
reg-names = "rcu", "sec", "wdt";
clock-names = "sclk0";
status = "disabled";
bootph-pre-ram;
};
eth0: eth0 {
compatible = "snps,arc-dwmac-3.70a";
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&eth0_default>;
snps,reset-active-low;
snps,reset-delays-us = <1000 1000 1000>;
status = "okay";
};
i2c0: i2c0@31001400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi-i2c";
reg = <0x31001400 0x1000>;
clock-names = "i2c";
status = "okay";
bootph-pre-ram;
};
i2c1: i2c1@31001500 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi-i2c";
reg = <0x31001500 0x1000>;
clock-names = "i2c";
status = "okay";
bootph-pre-ram;
};
i2c2: i2c2@31001600 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi-i2c";
reg = <0x31001600 0x1000>;
clock-names = "i2c";
status = "okay";
bootph-pre-ram;
};
};
};

95
arch/arm/mach-sc5xx/Kconfig
View File

@@ -117,20 +117,85 @@ endchoice
endif
config SC5XX_UBOOT_SPL_OFFSET
hex "SPL offset"
default 0x0
help
The default offset where the SPL is located.
config SC5XX_UBOOT_OFFSET
hex "U-Boot offset"
default 0x40000
help
The default offset where u-boot is located.
config SC5XX_FITIMAGE_OFFSET
hex "FitImage offset"
default 0x1a0000
help
The default offset where the fitImage is located.
config SC5XX_ROOTFS_OFFSET
hex "RootFS offset"
default 0x102000
help
The default offset where the rootfs is located.
config SC5XX_LOADADDR
hex "Load address"
default 0x90000000
help
The default load address for u-boot.
menu "Binman configuration"
config SC5XX_USE_BINMAN
bool "Use binman for final image"
select BINMAN
help
If you wish to use binman to assemble an image, say 'Y' here.
This will enable binman-specific sections in the device tree.
config SC5XX_BINMAN_FILENAME
string "Image name"
default "sc5xx-image.img"
depends on SC5XX_USE_BINMAN
help
The name of the image that will be created by binman.
This is used to create the final image.
config SC5XX_FITIMAGE_NAME
string "FitImage name"
default "fitImage"
depends on SC5XX_USE_BINMAN
help
The name of the fitImage to be packed by binman.
This is used to create the final image.
config SC5XX_ROOTFS_NAME
string "RootFS name"
default "rootfs"
depends on SC5XX_USE_BINMAN
help
The name of the rootfs to be packed by binman.
This is used to create the final image.
endmenu
config ADI_IMAGE
string "ADI fitImage type"
help
The image built by the ADI ADSP Linux build system.
Is one of tiny, minimal, full.
config SC_BOOT_MODE
int "SC5XX boot mode select"
config SC_BCODE
int "SC5XX SPI BCODE select"
default 1
range 0 7
range 0 15
help
Mode 0: do nothing, just idle
Mode 1: boot ldr out of serial flash
Mode 7: boot ldr over uart
This sets the BCODE option for the generated LDR file. The BCODE
is only used in SPI boots (QSPI/OSPI) but is set with no impact
in other boot modes so that one LDR file may be reused from any
boot media. The interpretation of this value is SoC and boot mode
specific, so you must refer to the HRM to interpret it.
config SC_BOOT_SPI_BUS
int "sc5xx spi boot bus"
@@ -209,21 +274,27 @@ config ADI_BUG_EZKHW21
This workaround affects the SC584 EZKIT and addresses bug EZKHW21.
It disables gigabit ethernet mode and limits the board to 100 Mbps
choice
prompt "Analog Devices SOM Carrier Board Variant"
depends on (SC59X || SC59X_64)
default ADI_CARRIER_SOMCRR_EZKIT
help
Select the specific EV-SOMCRR carrier board that you are using.
Using a SOM without a carrier board is not supported.
config ADI_CARRIER_SOMCRR_EZKIT
bool "Support the EV-SOMCRR-EZKIT"
depends on (SC59X || SC59X_64)
help
Say y to include support for the EV-SOMCRR-EZKIT carrier board,
which is compatible with the SC594 and SC598 SOMs. The EZKIT is
mutually incompatible with the EZLITE.
which is compatible with the SC594 and SC598 SOMs.
config ADI_CARRIER_SOMCRR_EZLITE
bool "Support the EV-SOMCRR-EZLITE"
depends on (SC59X || SC59X_64)
help
Say y to include support for the EV-SOMCRR-EZLITE carrier board,
which is compatible with the SC594 and SC598 SOMs. The EZLITE is
mutually incompatible with the EZKIT.
which is compatible with the SC594 and SC598 SOMs.
endchoice
config ADI_SPL_FORCE_BMODE
int "Force the SPL to use this BMODE device during next boot stage"

2
arch/arm/mach-sc5xx/config.mk
View File

@@ -14,5 +14,5 @@ endif
INPUTS-y += u-boot.ldr
LDR_FLAGS += --bcode=$(CONFIG_SC_BOOT_MODE)
LDR_FLAGS += --bcode=$(CONFIG_SC_BCODE)
LDR_FLAGS += --use-vmas

8
board/adi/carriers/Makefile Normal file
View File

@@ -0,0 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2024 - Analog Devices, Inc.
#
obj-y += somcrr_common.o
obj-$(CONFIG_ADI_CARRIER_SOMCRR_EZKIT) += somcrr_ezkit.o
obj-$(CONFIG_ADI_CARRIER_SOMCRR_EZLITE) += somcrr_ezlite.o

14
board/adi/carriers/somcrr.h Normal file
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@@ -0,0 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*
*/
#ifndef BOARD_ADI_CARRIERS_SOMCRR_H
#define BOARD_ADI_CARRIERS_SOMCRR_H
void adi_somcrr_init_ethernet(void);
void adi_somcrr_enable_ethernet(void);
void adi_somcrr_disable_ethernet(void);
#endif

19
board/adi/carriers/somcrr_common.c Normal file
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@@ -0,0 +1,19 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <linux/delay.h>
#include "somcrr.h"
void adi_somcrr_init_ethernet(void)
{
adi_somcrr_enable_ethernet();
mdelay(20);
adi_somcrr_disable_ethernet();
mdelay(90);
adi_somcrr_enable_ethernet();
mdelay(20);
}

38
board/adi/carriers/somcrr_ezkit.c Normal file
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@@ -0,0 +1,38 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <asm/gpio.h>
#include "somcrr.h"
void adi_somcrr_enable_ethernet(void)
{
struct gpio_desc *eth1;
struct gpio_desc *eth1_reset;
struct gpio_desc *gige_reset;
gpio_hog_lookup_name("eth1-en", &eth1);
gpio_hog_lookup_name("eth1-reset", &eth1_reset);
gpio_hog_lookup_name("gige-reset", &gige_reset);
dm_gpio_set_value(eth1, 1);
dm_gpio_set_value(eth1_reset, 0);
dm_gpio_set_value(gige_reset, 0);
}
void adi_somcrr_disable_ethernet(void)
{
struct gpio_desc *eth1;
struct gpio_desc *eth1_reset;
struct gpio_desc *gige_reset;
gpio_hog_lookup_name("eth1-en", &eth1);
gpio_hog_lookup_name("eth1-reset", &eth1_reset);
gpio_hog_lookup_name("gige-reset", &gige_reset);
dm_gpio_set_value(eth1, 0);
dm_gpio_set_value(eth1_reset, 1);
dm_gpio_set_value(gige_reset, 1);
}

24
board/adi/carriers/somcrr_ezlite.c Normal file
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@@ -0,0 +1,24 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <asm/gpio.h>
#include "somcrr.h"
void adi_somcrr_enable_ethernet(void)
{
struct gpio_desc *gige_reset;
gpio_hog_lookup_name("eth0-reset", &gige_reset);
dm_gpio_set_value(gige_reset, 0);
}
void adi_somcrr_disable_ethernet(void)
{
struct gpio_desc *gige_reset;
gpio_hog_lookup_name("eth0-reset", &gige_reset);
dm_gpio_set_value(gige_reset, 1);
}

34
board/adi/common-sc594-som/sc594-som.c Normal file
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@@ -0,0 +1,34 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <config.h>
#include <phy.h>
#include <asm/u-boot.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/soc.h>
#include "../carriers/somcrr.h"
int board_phy_config(struct phy_device *phydev)
{
if (IS_ENABLED(CONFIG_ADI_CARRIER_SOMCRR_EZKIT))
fixup_dp83867_phy(phydev);
return 0;
}
int board_init(void)
{
sc59x_remap_ospi();
if (IS_ENABLED(CONFIG_ADI_CARRIER_SOMCRR_EZKIT) ||
IS_ENABLED(CONFIG_ADI_CARRIER_SOMCRR_EZLITE)) {
adi_somcrr_init_ethernet();
}
sc5xx_enable_rgmii();
return 0;
}

34
board/adi/common-sc598-som/sc598-som.c Normal file
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@@ -0,0 +1,34 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <config.h>
#include <phy.h>
#include <asm/u-boot.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/soc.h>
#include <asm/armv8/mmu.h>
#include "../carriers/somcrr.h"
int board_phy_config(struct phy_device *phydev)
{
if (IS_ENABLED(CONFIG_ADI_CARRIER_SOMCRR_EZKIT))
fixup_dp83867_phy(phydev);
return 0;
}
int board_init(void)
{
sc59x_remap_ospi();
if (IS_ENABLED(CONFIG_ADI_CARRIER_SOMCRR_EZKIT) ||
IS_ENABLED(CONFIG_ADI_CARRIER_SOMCRR_EZLITE)) {
adi_somcrr_init_ethernet();
}
sc5xx_enable_rgmii();
return 0;
}

6
board/adi/sc573-ezkit/Makefile Normal file
View File

@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y += sc573-ezkit.o

21
board/adi/sc573-ezkit/sc573-ezkit.c Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <phy.h>
#include <asm/u-boot.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/soc.h>
int board_phy_config(struct phy_device *phydev)
{
fixup_dp83867_phy(phydev);
return 0;
}
int board_init(void)
{
sc5xx_enable_rgmii();
return 0;
}

18
board/adi/sc573-ezkit/sc573-ezkit.env
View File

@@ -1,13 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x20000
adi_image_offset=0xE0000
adi_rfs_offset=0x6E0000
loadaddr=0x83000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc573-ezkit.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_SPI
#define USE_RAM
#define USE_MMC
#include <env/adi/adi_boot.env>

6
board/adi/sc584-ezkit/Makefile Normal file
View File

@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := sc584-ezkit.o

21
board/adi/sc584-ezkit/sc584-ezkit.c Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <phy.h>
#include <asm/u-boot.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/soc.h>
int board_phy_config(struct phy_device *phydev)
{
fixup_dp83867_phy(phydev);
return 0;
}
int board_init(void)
{
sc5xx_enable_rgmii();
return 0;
}

17
board/adi/sc584-ezkit/sc584-ezkit.env
View File

@@ -1,13 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x20000
adi_image_offset=0xE0000
adi_rfs_offset=0x6E0000
loadaddr=0x89300000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc584-ezkit.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_SPI
#define USE_RAM
#include <env/adi/adi_boot.env>

6
board/adi/sc589-ezkit/Makefile Normal file
View File

@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := sc589-ezkit.o

21
board/adi/sc589-ezkit/sc589-ezkit.c Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <phy.h>
#include <asm/u-boot.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/soc.h>
int board_phy_config(struct phy_device *phydev)
{
fixup_dp83867_phy(phydev);
return 0;
}
int board_init(void)
{
sc5xx_enable_rgmii();
return 0;
}

18
board/adi/sc589-ezkit/sc589-ezkit.env
View File

@@ -1,13 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x20000
adi_image_offset=0xE0000
adi_rfs_offset=0x6E0000
loadaddr=0xC3000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc589-ezkit.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_RAM
#define USE_MMC
#define USE_SPI
#include <env/adi/adi_boot.env>

6
board/adi/sc589-mini/Makefile Normal file
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@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := sc589-mini.o

21
board/adi/sc589-mini/sc589-mini.c Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* (C) Copyright 2025 - Analog Devices, Inc.
*/
#include <phy.h>
#include <asm/u-boot.h>
#include <asm/arch-adi/sc5xx/sc5xx.h>
#include <asm/arch-adi/sc5xx/soc.h>
int board_phy_config(struct phy_device *phydev)
{
fixup_dp83867_phy(phydev);
return 0;
}
int board_init(void)
{
sc5xx_enable_rgmii();
return 0;
}

18
board/adi/sc589-mini/sc589-mini.env
View File

@@ -1,13 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x20000
adi_image_offset=0xE0000
adi_rfs_offset=0x8E0000
loadaddr=0xC3000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc589-mini.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_RAM
#define USE_SPI
#define USE_MMC
#include <env/adi/adi_boot.env>

8
board/adi/sc594-som-ezkit/Makefile Normal file
View File

@@ -0,0 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := ../common-sc594-som/sc594-som.o
obj-y += ../carriers/

19
board/adi/sc594-som-ezkit/sc594-som-ezkit.env
View File

@@ -1,13 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x40000
adi_image_offset=0x0120000
adi_rfs_offset=0x1020000
loadaddr=0xA2000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc594-som-ezkit.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_SPI
#define USE_OSPI
#define USE_RAM
#define USE_MMC
#include <env/adi/adi_boot.env>

8
board/adi/sc594-som-ezlite/Makefile Normal file
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@@ -0,0 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := ../common-sc594-som/sc594-som.o
obj-y += ../carriers/

19
board/adi/sc594-som-ezlite/sc594-som-ezlite.env
View File

@@ -1,13 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x40000
adi_image_offset=0x0120000
adi_rfs_offset=0x1020000
loadaddr=0xA2000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc594-som-ezlite.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_SPI
#define USE_OSPI
#define USE_RAM
#define USE_MMC
#include <env/adi/adi_boot.env>

8
board/adi/sc598-som-ezkit/Makefile Normal file
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@@ -0,0 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := ../common-sc598-som/sc598-som.o
obj-y += ../carriers/

19
board/adi/sc598-som-ezkit/sc598-som-ezkit.env
View File

@@ -1,13 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x40000
adi_image_offset=0x01a0000
adi_rfs_offset=0x1020000
loadaddr=0x90000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc598-som-ezkit.jffs2
loadaddr=CONFIG_SC5XX_LOADADDR
#define USE_NFS
#define USE_SPI
#define USE_OSPI
#define USE_RAM
#define USE_MMC
#include <env/adi/adi_boot.env>

8
board/adi/sc598-som-ezlite/Makefile Normal file
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@@ -0,0 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#
# (C) Copyright 2025 - Analog Devices, Inc.
#
obj-y := ../common-sc598-som/sc598-som.o
obj-y += ../carriers/

13
board/adi/sc598-som-ezlite/sc598-som-ezlite.env
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@@ -1,13 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-or-later+ */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/
#include <env/adi/adi_boot.env>
adi_stage2_offset=0x40000
adi_image_offset=0x01a0000
adi_rfs_offset=0x1020000
loadaddr=0x90000000
adi_stage2_offset=CONFIG_SC5XX_UBOOT_OFFSET
adi_image_offset=CONFIG_SC5XX_FITIMAGE_OFFSET
adi_rfs_offset=CONFIG_SC5XX_ROOTFS_OFFSET
loadaddr=CONFIG_SC5XX_LOADADDR
jffs2file=adsp-sc5xx-__stringify(CONFIG_ADI_IMAGE)-adsp-sc598-som-ezlite.jffs2
#include <env/adi/adi_boot.env>

90
configs/sc573-ezkit_defconfig Normal file
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@@ -0,0 +1,90 @@
CONFIG_ARM=y
CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0xD0000
CONFIG_ENV_SECT_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
CONFIG_SC5XX_UBOOT_OFFSET=0x20000
CONFIG_SC5XX_FITIMAGE_OFFSET=0xE0000
CONFIG_SC5XX_ROOTFS_OFFSET=0x6E0000
CONFIG_SC5XX_LOADADDR=0x83000000
CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_CGU0_CLKOUTSEL=7
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ramboot"
CONFIG_SYS_CBSIZE=512
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_I2C=y
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc573-ezkit"
CONFIG_NET_RETRY_COUNT=20
CONFIG_IP_DEFRAG=y
CONFIG_SPL_CLK=y
CONFIG_SPL_CLK_CCF=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_MCP230XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DW_ALTDESCRIPTOR=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_SC5XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
CONFIG_FAT_WRITE=y
# CONFIG_REGEX is not set

96
configs/sc584-ezkit_defconfig Normal file
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CONFIG_ARM=y
CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0xD0000
CONFIG_ENV_SECT_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x200C0000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_BSS_START_ADDR=0x200A0000
CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SC58X=y
CONFIG_SC5XX_UBOOT_OFFSET=0x20000
CONFIG_SC5XX_FITIMAGE_OFFSET=0xE0000
CONFIG_SC5XX_ROOTFS_OFFSET=0x6E0000
CONFIG_SC5XX_LOADADDR=0x89300000
CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_ADI_BUG_EZKHW21=y
CONFIG_CGU0_CLKOUTSEL=7
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ramboot"
CONFIG_SYS_CBSIZE=512
CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_I2C=y
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
# CONFIG_OF_TAG_MIGRATE is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=10000000
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc584-ezkit"
CONFIG_NET_RETRY_COUNT=20
CONFIG_IP_DEFRAG=y
CONFIG_SPL_CLK=y
CONFIG_SPL_CLK_CCF=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_MCP230XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DW_ALTDESCRIPTOR=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_SC5XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
CONFIG_FAT_WRITE=y
# CONFIG_REGEX is not set
# CONFIG_SPL_CRC8 is not set

101
configs/sc589-ezkit_defconfig Normal file
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CONFIG_ARM=y
CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xC203F000
CONFIG_SF_DEFAULT_SPEED=1000000
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0xD0000
CONFIG_ENV_SECT_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x200C0000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_BSS_START_ADDR=0x200A0000
CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SC58X=y
CONFIG_TARGET_SC589_EZKIT=y
CONFIG_SC5XX_UBOOT_OFFSET=0x20000
CONFIG_SC5XX_FITIMAGE_OFFSET=0xE0000
CONFIG_SC5XX_ROOTFS_OFFSET=0x6E0000
CONFIG_SC5XX_LOADADDR=0xC3000000
CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_ADI_USE_DMC1=y
CONFIG_CGU0_CLKOUTSEL=7
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ramboot"
CONFIG_SYS_CBSIZE=512
CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_I2C=y
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=10000000
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc589-ezkit"
CONFIG_NET_RETRY_COUNT=20
CONFIG_IP_DEFRAG=y
CONFIG_SPL_CLK=y
CONFIG_SPL_CLK_CCF=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_MCP230XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DW_ALTDESCRIPTOR=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_SC5XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
CONFIG_FAT_WRITE=y
# CONFIG_REGEX is not set
# CONFIG_SPL_CRC8 is not set

97
configs/sc589-mini_defconfig Normal file
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CONFIG_ARM=y
CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xC203F000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xD0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x200C0000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_BSS_START_ADDR=0x200A0000
CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SC58X=y
CONFIG_TARGET_SC589_MINI=y
CONFIG_SC5XX_UBOOT_OFFSET=0x20000
CONFIG_SC5XX_FITIMAGE_OFFSET=0xE0000
CONFIG_SC5XX_ROOTFS_OFFSET=0x8E0000
CONFIG_SC5XX_LOADADDR=0xC3000000
CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_ADI_USE_DMC1=y
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ramboot"
CONFIG_SYS_CBSIZE=512
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_I2C=y
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
# CONFIG_CMD_ELF is not set
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=10000000
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc589-mini"
CONFIG_NET_RETRY_COUNT=20
CONFIG_IP_DEFRAG=y
CONFIG_SPL_CLK=y
CONFIG_SPL_CLK_CCF=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_SNPS=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DW_ALTDESCRIPTOR=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_SC5XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
CONFIG_FAT_WRITE=y
# CONFIG_REGEX is not set

78
configs/sc594-som-ezkit-spl_defconfig Normal file
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CONFIG_ARM=y
CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8203f000
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
CONFIG_SC59X=y
CONFIG_TARGET_SC594_SOM_EZKIT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ospiboot"
CONFIG_SYS_CBSIZE=512
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_OF_EMBED=y
# CONFIG_OF_TAG_MIGRATE is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc594-som-ezkit"
CONFIG_NET_RETRY_COUNT=20
CONFIG_IP_DEFRAG=y
CONFIG_DM_DMA=y
CONFIG_DMA=y
CONFIG_DMA_CHANNELS=y
CONFIG_ADI_DMA=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_MCP230XX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DW_ALTDESCRIPTOR=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_CADENCE_QSPI=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y

87
configs/sc594-som-ezlite-spl_defconfig Normal file
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CONFIG_ARM=y
CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x200E4000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
CONFIG_SC59X=y
CONFIG_CGU1_DIV_S1SELEX=16
CONFIG_CDU0_CLKO10=5
CONFIG_SF_DEFAULT_BUS=0
CONFIG_SF_DEFAULT_CS=0
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ospiboot"
CONFIG_SYS_CBSIZE=512
CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
# CONFIG_DOS_PARTITION is not set
CONFIG_OF_EMBED=y
# CONFIG_OF_TAG_MIGRATE is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc594-som-ezlite"
CONFIG_NET_RETRY_COUNT=20
CONFIG_IP_DEFRAG=y
CONFIG_DM_DMA=y
CONFIG_DMA=y
CONFIG_DMA_CHANNELS=y
CONFIG_ADI_DMA=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_MCP230XX_GPIO=y
CONFIG_ADP5588_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DW_ALTDESCRIPTOR=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_CADENCE_QSPI=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
# CONFIG_SPL_CRC8 is not set
# CONFIG_TOOLS_MKEFICAPSULE is not set

111
configs/sc598-som-ezkit-spl_defconfig Normal file
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CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=31250000
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x180000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
CONFIG_SC59X_64=y
CONFIG_TARGET_SC598_SOM_EZKIT=y
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CGU1_PLL3_DDRCLK=y
CONFIG_CGU1_PLL3_VCO_MSEL=64
CONFIG_CGU1_PLL3_DCLK_DIV=2
CONFIG_CGU1_DIV_S1SELEX=27
CONFIG_CDU0_CLKO0=1
CONFIG_CDU0_CLKO1=1
CONFIG_CDU0_CLKO2=7
CONFIG_CDU0_CLKO3=1
CONFIG_CDU0_CLKO4=3
CONFIG_CDU0_CLKO5=1
CONFIG_CDU0_CLKO6=1
CONFIG_CDU0_CLKO7=1
CONFIG_CDU0_CLKO8=3
CONFIG_CDU0_CLKO9=1
CONFIG_CDU0_CLKO10=5
CONFIG_CDU0_CLKO12=1
CONFIG_CDU0_CLKO13=3
CONFIG_CDU0_CLKO14=3
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run spiboot"
CONFIG_SYS_CBSIZE=512
CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
# CONFIG_SPL_SEPARATE_BSS is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_CMD_DM=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_EMBED=y
# CONFIG_OF_TAG_MIGRATE is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc598-som-ezkit"
CONFIG_NET_RETRY_COUNT=20
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DMA=y
CONFIG_DMA_CHANNELS=y
CONFIG_ADI_DMA=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_MCP230XX_GPIO=y
CONFIG_ADP5588_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MMC_BROKEN_CD=y
CONFIG_MMC_SDHCI_ADI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ADI=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_REMOTEPROC_ADI_SC5XX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_CADENCE_QSPI=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
# CONFIG_SPL_CRC8 is not set
# CONFIG_TOOLS_MKEFICAPSULE is not set

110
configs/sc598-som-ezlite-spl_defconfig Normal file
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CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=31250000
# CONFIG_ARM64_SUPPORT_AARCH32 is not set
CONFIG_ARCH_SC5XX=y
CONFIG_SYS_MALLOC_LEN=0x100000
CONFIG_SPL_GPIO=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x180000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x200E4000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
CONFIG_SC59X_64=y
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CGU1_PLL3_DDRCLK=y
CONFIG_CGU1_PLL3_VCO_MSEL=64
CONFIG_CGU1_PLL3_DCLK_DIV=2
CONFIG_CGU1_DIV_S1SELEX=27
CONFIG_CDU0_CLKO0=1
CONFIG_CDU0_CLKO1=1
CONFIG_CDU0_CLKO2=7
CONFIG_CDU0_CLKO3=1
CONFIG_CDU0_CLKO4=3
CONFIG_CDU0_CLKO5=1
CONFIG_CDU0_CLKO6=1
CONFIG_CDU0_CLKO7=1
CONFIG_CDU0_CLKO8=3
CONFIG_CDU0_CLKO9=1
CONFIG_CDU0_CLKO10=5
CONFIG_CDU0_CLKO12=1
CONFIG_CDU0_CLKO13=3
CONFIG_CDU0_CLKO14=3
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run spiboot"
CONFIG_SYS_CBSIZE=512
CONFIG_CYCLIC_MAX_CPU_TIME_US=1000
# CONFIG_SPL_SEPARATE_BSS is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_CMD_DM=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=2
CONFIG_CMD_USB=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_DNS=y
CONFIG_CMD_MII=y
# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_EMBED=y
# CONFIG_OF_TAG_MIGRATE is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="sc598-som-ezlite"
CONFIG_NET_RETRY_COUNT=20
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DMA=y
CONFIG_DMA_CHANNELS=y
CONFIG_ADI_DMA=y
CONFIG_GPIO_HOG=y
CONFIG_SPL_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
CONFIG_ADP5588_GPIO=y
CONFIG_DM_I2C=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_ADI=y
CONFIG_MMC_BROKEN_CD=y
CONFIG_MMC_SDHCI_ADI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ADI=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_GENERIC is not set
CONFIG_REMOTEPROC_ADI_SC5XX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ADI_SPI3=y
CONFIG_CADENCE_QSPI=y
CONFIG_SPL_TIMER=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
# CONFIG_SPL_CRC8 is not set
# CONFIG_TOOLS_MKEFICAPSULE is not set

16
tools/docker/Dockerfile
View File

@@ -334,6 +334,22 @@ RUN wget -O - https://coreboot.org/releases/coreboot-25.03.tar.xz | tar -C /tmp
sudo cp build/coreboot.rom build/cbfstool /opt/coreboot/ && \
rm -rf /tmp/coreboot-25.03
# Build ldr tool for Analog Devices boards and create prefixed symlinks to match
# $(CROSS_COMPILE) as used by different supported platforms
RUN git clone --depth=1 -b v1.0.2 https://github.com/analogdevicesinc/adsp-ldr.git /opt/adi-adsp-ldr && \
cd /opt/adi-adsp-ldr && \
python3 -m venv venv && \
. venv/bin/activate && \
pip install meson && \
meson setup build && \
cd build && \
meson compile && \
cd .. && \
ln -s build/ldr arm-linux-gnueabi-ldr && \
ln -s build/ldr aarch64-linux-ldr && \
deactivate
ENV PATH="${PATH}:/opt/adi-adsp-ldr"
# Create our user/group
RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot
RUN useradd -m -U uboot