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https://source.denx.de/u-boot/u-boot.git
synced 2026-06-02 09:46:37 +03:00
dts: msm8996: replace with upstream DTS
Drop the U-Boot specific dragonboard820c.dts file in favour of the upstream apq8096-db820c.dts and an additional -u-boot.dtsi with the U-Boot specific additions. Taken from kernel tag v6.7 Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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@@ -625,7 +625,7 @@ dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \
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dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
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dtb-$(CONFIG_ARCH_SNAPDRAGON) += apq8016-sbc.dtb \
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dragonboard820c.dtb \
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apq8096-db820c.dtb \
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sdm845-db845c.dtb \
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sdm845-samsung-starqltechn.dtb \
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qcs404-evb.dtb
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14
arch/arm/dts/apq8096-db820c-u-boot.dtsi
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14
arch/arm/dts/apq8096-db820c-u-boot.dtsi
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@@ -0,0 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2024, Linaro Ltd.
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*/
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/ {
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/* Ensure that the fdtfile variable is generated properly */
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compatible = "qcom,apq8096-db820c", "qcom,apq8096";
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};
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&sdhc2 {
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status = "okay";
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clock-frequency = <100000000>;
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};
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1137
arch/arm/dts/apq8096-db820c.dts
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1137
arch/arm/dts/apq8096-db820c.dts
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File diff suppressed because it is too large
Load Diff
@@ -1,32 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* U-Boot addition to handle Dragonboard 820c pins
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*
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* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
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*/
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/ {
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smem {
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bootph-all;
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};
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soc {
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bootph-all;
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pinctrl@1010000 {
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bootph-all;
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uart {
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bootph-all;
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};
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};
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clock-controller@300000 {
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bootph-all;
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};
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serial@75b0000 {
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bootph-all;
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};
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};
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};
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@@ -1,153 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Qualcomm APQ8096 based Dragonboard 820C board device tree source
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*
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* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
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*/
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/dts-v1/;
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#include "skeleton64.dtsi"
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#include <dt-bindings/clock/qcom,gcc-msm8996.h>
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/ {
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model = "Qualcomm Technologies, Inc. DB820c";
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compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &blsp2_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0 0x80000000 0 0xc0000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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smem_mem: smem_region@86300000 {
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reg = <0x0 0x86300000 0x0 0x200000>;
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no-map;
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_mem>;
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};
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soc: soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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gcc: clock-controller@300000 {
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compatible = "qcom,gcc-msm8996";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0x300000 0x90000>;
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};
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pinctrl: pinctrl@1010000 {
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compatible = "qcom,msm8996-pinctrl";
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reg = <0x1010000 0x400000>;
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blsp8_uart: uart {
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function = "blsp_uart8";
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pins = "GPIO_4", "GPIO_5";
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drive-strength = <8>;
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bias-disable;
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};
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};
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blsp2_uart2: serial@75b0000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0x75b0000 0x1000>;
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clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>;
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clock-names = "core";
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pinctrl-names = "uart";
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pinctrl-0 = <&blsp8_uart>;
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};
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sdhc2: sdhci@74a4900 {
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compatible = "qcom,sdhci-msm-v4";
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reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
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index = <0x0>;
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bus-width = <4>;
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clock = <&gcc GCC_SDCC1_APPS_CLK>;
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clock-frequency = <200000000>;
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};
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spmi_bus: spmi@400f000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x0400f000 0x1000>,
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<0x04400000 0x800000>,
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<0x04c00000 0x800000>,
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<0x05800000 0x200000>,
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<0x0400a000 0x002100>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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pmic0: pm8994@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0x0 0x1>;
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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pm8994_pon: pon@800 {
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compatible = "qcom,pm8916-pon";
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reg = <0x800 0x100>;
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mode-bootloader = <0x2>;
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mode-recovery = <0x1>;
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pwrkey {
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compatible = "qcom,pm8941-pwrkey";
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debounce = <15625>;
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bias-pull-up;
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};
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pm8994_resin: resin {
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compatible = "qcom,pm8941-resin";
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debounce = <15625>;
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bias-pull-up;
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};
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};
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pm8994_gpios: pm8994_gpios@c000 {
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compatible = "qcom,pm8994-gpio";
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reg = <0xc000 0x400>;
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gpio-controller;
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gpio-ranges = <&pm8994_gpios 0 0 22>;
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#gpio-cells = <2>;
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};
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};
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pmic1: pm8994@1 {
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compatible = "qcom,spmi-pmic";
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reg = <0x1 0x1>;
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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};
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};
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};
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};
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#include "dragonboard820c-uboot.dtsi"
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3884
arch/arm/dts/msm8996.dtsi
Normal file
3884
arch/arm/dts/msm8996.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
@@ -7,7 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x804000
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
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CONFIG_ENV_SIZE=0x4000
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CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c"
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CONFIG_DEFAULT_DEVICE_TREE="apq8096-db820c"
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CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C"
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CONFIG_SYS_LOAD_ADDR=0x80080000
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CONFIG_DISTRO_DEFAULTS=y
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