CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25974

- Fix power-domain ref counting regression.
- Fix i.MX8MP USB clock regression.
- Fix i.MX8MM osc_32k regression in SPL.
- Finish converting clock-osc-24 back to osc_24 on i.MX.
- Several imx8mp capricorn updates.
- Update Stefano Babic's email address.
- Fix fsl_qspi bug by moving AHB read buffer config after LUT.
- Fix verdin imx95 sku 0089 pid4.
This commit is contained in:
Tom Rini
2025-04-28 10:19:29 -06:00
29 changed files with 438 additions and 232 deletions

View File

@@ -125,7 +125,7 @@ Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> <sivadur@xilinx.
Srinivas Goud <srinivas.goud@amd.com> <srinivas.goud@xilinx.com>
Srinivas Neeli <srinivas.neeli@amd.com> <srinivas.neeli@xilinx.com>
Stefan Roese <sr@denx.de> <stroese>
Stefano Babic <sbabic@denx.de>
Stefano Babic <sbabic@nabladev.com>
Stefano Stabellini <stefano.stabellini@amd.com> <stefano.stabellini@xilinx.com>
Sumit Garg <sumit.garg@kernel.org> <sumit.garg@linaro.org>
Tom Rini <trini@konsulko.com> <trini@ti.com>

View File

@@ -297,7 +297,7 @@ F: test/cmd/armffa.c
F: test/dm/ffa.c
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
M: Stefano Babic <sbabic@nabladev.com>
M: Fabio Estevam <festevam@gmail.com>
R: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
S: Maintained

View File

@@ -240,6 +240,11 @@
bootph-pre-ram;
};
&osc_32k {
bootph-all;
bootph-pre-ram;
};
#ifdef CONFIG_FSL_CAAM
&sec_jr0 {
bootph-pre-ram;

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@@ -13,6 +13,8 @@ int sandbox_power_domain_query(struct udevice *dev, unsigned long id);
int sandbox_power_domain_test_get(struct udevice *dev);
int sandbox_power_domain_test_on(struct udevice *dev);
int sandbox_power_domain_test_off(struct udevice *dev);
int sandbox_power_domain_test_on_ll(struct udevice *dev);
int sandbox_power_domain_test_off_ll(struct udevice *dev);
int sandbox_power_domain_test_free(struct udevice *dev);
#endif

View File

@@ -1,6 +1,5 @@
MX51EVK BOARD
M: Fabio Estevam <festevam@gmail.com>
M: Stefano Babic <sbabic@denx.de>
S: Maintained
F: board/freescale/mx51evk/
F: include/configs/mx51evk.h

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@@ -9,4 +9,5 @@ F: arch/arm/dts/imx8-capricorn-u-boot.dtsi
F: arch/arm/dts/imx8-capricorn.dtsi
F: board/siemens/capricorn/
F: configs/capricorn_cxg3_defconfig
F: configs/imx8qxp_capricorn.config
F: include/configs/capricorn-common.h

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@@ -0,0 +1,49 @@
altbootcmd=run bootcmd
baudrate=115200
bootcmd=run flash_self;reset;
bootdelay=3
bootdir=targetdir/rootfs/boot
bootlimit=3
check_upgrade=if test ${upgrade_available} -eq 1; then echo upgrade_available is set; if test ${bootcount} -gt ${bootlimit}; then setenv upgrade_available 0;echo toggle partition;run toggle_partition;fi;fi;
cntr_addr=0x88000000
cntr_file=os_cntr_signed.bin
console=ttyLP2
dtb_name_default=default
ethprime=eth1
fdt_addr=0x83000000
fdt_high=0xffffffffffffffff
flash_self=run mmc_boot
flash_self_test=setenv testargs test loglevel=3 systemd.unit=test.target; run mmc_boot
hostname=capricorn
initrd_addr=0x83100000
initrd_high=0xffffffffffffffff
ip_method=none
kernel_name=Image
loadaddr=0x80400000
mmc_boot=run set_bootargs;run check_upgrade; run set_partition;run set_bootargs_mmc;run mmc_load_bootfiles
mmc_boot_fit=ext4load mmc 0:${mmc_part_nr} 0x88000000 boot/fitImage;if test -n ${A};then setenv bootargs ${bootargs} rootfs_sig=${sig_a};fi;if test -n ${B};then setenv bootargs ${bootargs} rootfs_sig=${sig_b};fi;bootm 0x88000000#conf-${dtb_name}.dtb;bootm
mmc_boot_image=ext4load mmc 0:${mmc_part_nr} ${fdt_addr} boot/${dtb_name}.dtb;if test $? -eq 1;then ext4load mmc 0:${mmc_part_nr} ${fdt_addr} boot/${dtb_name_default}.dtb;fi; ext4load mmc 0:${mmc_part_nr} ${loadaddr} boot/${kernel_name}; booti ${loadaddr} - ${fdt_addr}
mmc_load_bootfiles=echo -n Loading from eMMC ...; if test -e mmc 0:${mmc_part_nr} boot/fitImage; then echo fit; setenv fdt_high; setenv initrd_high; run mmc_boot_fit; else echo image; run mmc_boot_image; fi
net_nfs=wdt dev scu-wdt; wdt stop; echo Booting from network ...; run set_bootargs_net; tftpboot ${loadaddr} ${bootdir}/${kernel_name}; printenv bootargs; if test ${kernel_name} = fitImage; then setenv fdt_high; setenv initrd_high; bootm ${loadaddr}#conf-${dtb_name}.dtb; else tftpboot ${fdt_addr} ${serverip}:${bootdir}/${dtb_name}.dtb; if test $? -eq 1; then echo Loading default.dtb!; tftpboot ${fdt_addr} ${serverip}:${bootdir}/${dtb_name_default}.dtb; fi; booti ${loadaddr} - ${fdt_addr}; fi
net_unfs=setenv nfsopts vers=3,udp,rsize=4096,wsize=4096,nolock,port=3049,mountport=3048 rw; run net_nfs
netdev=lan0
nfsopts=vers=3,udp,rsize=4096,wsize=4096,nolock rw
partitionset_active=A
rootfs_name=/dev/mmcblk0
rootpath=/home/projects/targetdir/rootfs
script_file=u-boot-commands.img
set_bootargs_mmc=setenv bootargs ${bootargs} root=${mmc_active_vol} ro rootdelay=1 rootwait rootfstype=ext4 ip=${ip_method}
set_bootargs_net=run set_bootargs; if test ${kernel_name} = fitImage; then setenv loadaddr 0x88000000; fi; setenv bootargs ${bootargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off
set_bootargs=setenv bootargs console=${console},${baudrate} target_env=${target_env} ${testargs} ${optargs}
set_partition=setenv ${partitionset_active} true;if test -n ${A}; then setenv mmc_part_nr 1;fi;if test -n ${B}; then setenv mmc_part_nr 2;fi;setenv mmc_active_vol ${rootfs_name}p${mmc_part_nr}
tftp_run_script=tftpboot ${kernel_loadaddr} ${serverip}:${script_file};if test $? -eq 0;then source ${kernel_loadaddr};fi
toggle_partition=setenv ${partitionset_active} true; if test -n ${A}; then setenv partitionset_active B; mmc partconf 0 1 2 0; env delete A; fi; if test -n ${B}; then setenv partitionset_active A; mmc partconf 0 1 1 0; env delete B; fi;saveenv; reset
upgrade_available=0
emmc_dev=0
sd_dev=1
mfgtool_args=setenv bootargs console=${console},${baudrate} rdinit=/linuxrc clk_ignore_unused
kboot=booti
bootcmd_mfg=run mfgtool_args; if iminfo ${initrd_addr}; then if test ${tee} = yes; then bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; else booti ${loadaddr} ${initrd_addr} ${fdt_addr}; fi; else echo "Run fastboot ..."; fastboot usb auto; fi;
fastboot_bytes=124c00
fastboot_dev=mmc
mmcautodetect=yes

View File

@@ -157,7 +157,7 @@ const struct toradex_som toradex_modules[] = {
{ VERDIN_IMX8MMDL_2G_IT, "Verdin iMX8M Mini DualLite 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) },
{ VERDIN_IMX8MMQ_2G_IT_NO_CAN, "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) },
{ AQUILA_AM69O_32G_WIFI_BT_IT, "Aquila AM69 Octa 32GB WB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) },
{ VERDIN_IMX95H_16G_WIFI_BT_IT, "Verdin iMX95 Hexa 16GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX95) },
{ VERDIN_IMX95H_8G_WIFI_BT_IT, "Verdin iMX95 Hexa 8GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX95) },
{ VERDIN_IMX8MMQ_4G_WIFI_BT_ET, "Verdin iMX8M Mini Quad 4GB WB ET", TARGET_IS_ENABLED(VERDIN_IMX8MM) },
{ APALIS_IMX8QM_WIFI_BT_IT_1300MHZ, "Apalis iMX8QM 4GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) },
{ APALIS_IMX8QM_IT_1300MHZ, "Apalis iMX8QM 4GB IT", TARGET_IS_ENABLED(APALIS_IMX8) },

View File

@@ -115,7 +115,7 @@ enum {
VERDIN_IMX8MMDL_2G_IT,
VERDIN_IMX8MMQ_2G_IT_NO_CAN,
AQUILA_AM69O_32G_WIFI_BT_IT,
VERDIN_IMX95H_16G_WIFI_BT_IT,
VERDIN_IMX95H_8G_WIFI_BT_IT,
VERDIN_IMX8MMQ_4G_WIFI_BT_ET, /* 90 */
APALIS_IMX8QM_WIFI_BT_IT_1300MHZ,
APALIS_IMX8QM_IT_1300MHZ,

View File

@@ -1,117 +1,16 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=3
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x200000
CONFIG_DM_GPIO=y
#include <configs/imx8qxp_capricorn.config>
CONFIG_DEFAULT_DEVICE_TREE="imx8-capricorn-cxg3"
CONFIG_TARGET_CAPRICORN=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x202000
CONFIG_IDENT_STRING=" ##v01.06"
CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2073
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg"
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_HAVE_INIT_STACK=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x120000
CONFIG_SPL_SYS_MALLOC_SIZE=0x4000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_READ=y
CONFIG_CMD_WDT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_MMC_ENV_PART=2
CONFIG_ENV_SOURCE_FILE="capricorn_default"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_ENV_OFFSET=0x200000
CONFIG_ENV_OFFSET_REDUND=0x202000
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth1"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd"
CONFIG_SPL_CLK=y
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_MV88E61XX_SWITCH=y
CONFIG_MV88E61XX_CPU_PORT=5
CONFIG_MV88E61XX_PHY_PORTS=0x7
@@ -119,23 +18,3 @@ CONFIG_DM_ETH_PHY=y
CONFIG_FEC_MXC_SHARE_MDIO=y
CONFIG_FEC_MXC_MDIO_BASE=0x5B050000
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PHY=y
CONFIG_NOP_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_WATCHDOG is not set
CONFIG_WDT=y
CONFIG_WDT_SIEMENS_PMIC=y
CONFIG_SPL_TINY_MEMSET=y

View File

@@ -0,0 +1,134 @@
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_TEXT_BASE=0x80020000
CONFIG_SYS_MALLOC_LEN=0x2800000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=3
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_ENV_SIZE=0x2000
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_MMC_ENV_PART=2
CONFIG_DM_GPIO=y
CONFIG_AHAB_BOOT=y
CONFIG_TARGET_CAPRICORN=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
CONFIG_SPL_TEXT_BASE=0x100000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_SPL=y
CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2073
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg"
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_HAVE_INIT_STACK=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x120000
CONFIG_SPL_SYS_MALLOC_SIZE=0x4000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_BIND is not set
CONFIG_CMD_WDT=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_READ=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd"
CONFIG_SPL_CLK=y
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_MII=y
CONFIG_PHY=y
CONFIG_NOP_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_WDT=y
CONFIG_WDT_SIEMENS_PMIC=y
CONFIG_SPL_TINY_MEMSET=y

View File

@@ -42,7 +42,7 @@ alias mbrugger Matthias Brugger <mbrugger@suse.com>
alias monstr Michal Simek <monstr@monstr.eu>
alias prom Minkyu Kang <mk7.kang@samsung.com>
alias ptomsich Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
alias sbabic Stefano Babic <sbabic@denx.de>
alias sbabic Stefano Babic <sbabic@nabladev.com>
alias simongoldschmidt Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
alias sjg Simon Glass <sjg@chromium.org>
alias smcnutt Scott McNutt <smcnutt@psyent.com>

View File

@@ -155,6 +155,8 @@ struct clk *clk_register_composite(struct udevice *dev, const char *name,
goto err;
}
composite->dev = dev;
if (composite->mux)
composite->mux->dev = clk->dev;
if (composite->rate)

View File

@@ -116,14 +116,42 @@ static const struct clk_ops imx8m_clk_composite_divider_ops = {
.set_rate = imx8m_clk_composite_divider_set_rate,
};
static int imx8m_clk_mux_fetch_parent_index(struct udevice *cdev, struct clk *clk, struct clk *parent)
{
struct clk_mux *mux = to_clk_mux(clk);
struct clk cclk;
int ret;
int i;
if (!parent)
return -EINVAL;
for (i = 0; i < mux->num_parents; i++) {
ret = clk_get_by_name(cdev, mux->parent_names[i], &cclk);
if (!ret && ofnode_equal(dev_ofnode(parent->dev), dev_ofnode(cclk.dev)))
return i;
if (!strcmp(parent->dev->name, mux->parent_names[i]))
return i;
if (!strcmp(parent->dev->name,
clk_resolve_parent_clk(clk->dev,
mux->parent_names[i])))
return i;
}
return -EINVAL;
}
static int imx8m_clk_mux_set_parent(struct clk *clk, struct clk *parent)
{
struct clk_mux *mux = to_clk_mux(clk);
struct clk_composite *composite = (struct clk_composite *)clk->data;
int index;
u32 val;
u32 reg;
index = clk_mux_fetch_parent_index(clk, parent);
index = imx8m_clk_mux_fetch_parent_index(composite->dev, clk, parent);
if (index < 0) {
log_err("Could not fetch index\n");
return index;

View File

@@ -81,19 +81,19 @@ static const char * const imx8mm_i2c4_sels[] = {"osc_24m", "sys_pll1_160m", "sys
"sys_pll3_out", "audio_pll1_out", "video_pll1_out",
"audio_pll2_out", "sys_pll1_133m", };
static const char * const imx8mm_uart1_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mm_uart1_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2", "clk_ext4",
"audio_pll2_out", };
static const char * const imx8mm_uart2_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mm_uart2_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2", "clk_ext3",
"audio_pll2_out", };
static const char * const imx8mm_uart3_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mm_uart3_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2", "clk_ext4",
"audio_pll2_out", };
static const char * const imx8mm_uart4_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mm_uart4_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2", "clk_ext3",
"audio_pll2_out", };

View File

@@ -97,19 +97,19 @@ static const char * const imx8mn_i2c4_sels[] = {"osc_24m", "sys_pll1_160m", "sys
"sys_pll3_out", "audio_pll1_out", "video_pll_out",
"audio_pll2_out", "sys_pll1_133m", };
static const char * const imx8mn_uart1_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mn_uart1_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
"clk_ext4", "audio_pll2_out", };
static const char * const imx8mn_uart2_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mn_uart2_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
"clk_ext3", "audio_pll2_out", };
static const char * const imx8mn_uart3_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mn_uart3_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
"clk_ext4", "audio_pll2_out", };
static const char * const imx8mn_uart4_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_pll2_200m",
static const char * const imx8mn_uart4_sels[] = {"osc_24m", "sys_pll1_80m", "sys_pll2_200m",
"sys_pll2_100m", "sys_pll3_out", "clk_ext2",
"clk_ext3", "audio_pll2_out", };

View File

@@ -163,4 +163,5 @@ U_BOOT_DRIVER(sandbox_scmi_devices) = {
.priv_auto = sizeof(struct sandbox_scmi_device_priv),
.remove = sandbox_scmi_devices_remove,
.probe = sandbox_scmi_devices_probe,
.flags = DM_FLAG_DEFAULT_PD_CTRL_OFF,
};

View File

@@ -506,8 +506,12 @@ static int imx8m_power_domain_bind(struct udevice *dev)
static int imx8m_power_domain_probe(struct udevice *dev)
{
struct imx8m_power_domain_plat *pdata = dev_get_plat(dev);
struct power_domain_plat *plat = dev_get_uclass_plat(dev);
int ret;
/* Every subdomain has its own device node */
plat->subdomains = 1;
/* Nothing to do for non-"power-domain" driver instances. */
if (!strstr(dev->name, "power-domain"))
return 0;

View File

@@ -201,8 +201,12 @@ int imx8mp_hsiomix_bind(struct udevice *dev)
static int imx8mp_hsiomix_probe(struct udevice *dev)
{
struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
struct power_domain_plat *plat = dev_get_uclass_plat(dev);
int ret;
/* Definitions are in imx8mp-power.h */
plat->subdomains = 5;
priv->base = dev_read_addr_ptr(dev);
ret = clk_get_by_name(dev, "usb", &priv->clk_usb);

View File

@@ -143,9 +143,13 @@ static int imx8mp_mediamix_bind(struct udevice *dev)
static int imx8mp_mediamix_probe(struct udevice *dev)
{
struct power_domain_plat *plat = dev_get_uclass_plat(dev);
struct imx8mp_mediamix_priv *priv = dev_get_priv(dev);
int ret;
/* Definitions are in imx8mp-power.h */
plat->subdomains = 9;
priv->base = dev_read_addr_ptr(dev);
ret = clk_get_by_name(dev, "apb", &priv->clk_apb);

View File

@@ -12,6 +12,10 @@
#include <power-domain-uclass.h>
#include <dm/device-internal.h>
struct power_domain_priv {
int *on_count;
};
static inline struct power_domain_ops *power_domain_dev_ops(struct udevice *dev)
{
return (struct power_domain_ops *)dev->driver->ops;
@@ -107,22 +111,67 @@ int power_domain_free(struct power_domain *power_domain)
return ops->rfree ? ops->rfree(power_domain) : 0;
}
int power_domain_on(struct power_domain *power_domain)
int power_domain_on_lowlevel(struct power_domain *power_domain)
{
struct power_domain_priv *priv = dev_get_uclass_priv(power_domain->dev);
struct power_domain_plat *plat = dev_get_uclass_plat(power_domain->dev);
struct power_domain_ops *ops = power_domain_dev_ops(power_domain->dev);
int *on_count = plat->subdomains ? &priv->on_count[power_domain->id] : NULL;
int ret;
debug("%s(power_domain=%p)\n", __func__, power_domain);
/* Refcounting is not enabled on all drivers by default */
if (on_count) {
debug("Enable power domain %s.%ld: %d -> %d (%s)\n",
power_domain->dev->name, power_domain->id, *on_count, *on_count + 1,
(((*on_count + 1) > 1) ? "EALREADY" : "todo"));
return ops->on ? ops->on(power_domain) : 0;
(*on_count)++;
if (*on_count > 1)
return -EALREADY;
}
ret = ops->on ? ops->on(power_domain) : 0;
if (ret) {
if (on_count)
(*on_count)--;
return ret;
}
return 0;
}
int power_domain_off(struct power_domain *power_domain)
int power_domain_off_lowlevel(struct power_domain *power_domain)
{
struct power_domain_priv *priv = dev_get_uclass_priv(power_domain->dev);
struct power_domain_plat *plat = dev_get_uclass_plat(power_domain->dev);
struct power_domain_ops *ops = power_domain_dev_ops(power_domain->dev);
int *on_count = plat->subdomains ? &priv->on_count[power_domain->id] : NULL;
int ret;
debug("%s(power_domain=%p)\n", __func__, power_domain);
/* Refcounting is not enabled on all drivers by default */
if (on_count) {
debug("Disable power domain %s.%ld: %d -> %d (%s%s)\n",
power_domain->dev->name, power_domain->id, *on_count, *on_count - 1,
(((*on_count) <= 0) ? "EALREADY" : ""),
(((*on_count - 1) > 0) ? "BUSY" : "todo"));
return ops->off ? ops->off(power_domain) : 0;
if (*on_count <= 0)
return -EALREADY;
(*on_count)--;
if (*on_count > 0)
return -EBUSY;
}
ret = ops->off ? ops->off(power_domain) : 0;
if (ret) {
if (on_count)
(*on_count)++;
return ret;
}
return 0;
}
#if CONFIG_IS_ENABLED(OF_REAL)
@@ -177,7 +226,36 @@ int dev_power_domain_off(struct udevice *dev)
}
#endif /* OF_REAL */
static int power_domain_post_probe(struct udevice *dev)
{
struct power_domain_priv *priv = dev_get_uclass_priv(dev);
struct power_domain_plat *plat = dev_get_uclass_plat(dev);
if (plat->subdomains) {
priv->on_count = calloc(sizeof(int), plat->subdomains);
if (!priv->on_count)
return -ENOMEM;
}
return 0;
}
static int power_domain_pre_remove(struct udevice *dev)
{
struct power_domain_priv *priv = dev_get_uclass_priv(dev);
struct power_domain_plat *plat = dev_get_uclass_plat(dev);
if (plat->subdomains)
free(priv->on_count);
return 0;
}
UCLASS_DRIVER(power_domain) = {
.id = UCLASS_POWER_DOMAIN,
.name = "power_domain",
.post_probe = power_domain_post_probe,
.pre_remove = power_domain_pre_remove,
.per_device_auto = sizeof(struct power_domain_priv),
.per_device_plat_auto = sizeof(struct power_domain_plat),
};

View File

@@ -34,6 +34,20 @@ int sandbox_power_domain_test_off(struct udevice *dev)
return power_domain_off(&sbrt->pd);
}
int sandbox_power_domain_test_on_ll(struct udevice *dev)
{
struct sandbox_power_domain_test *sbrt = dev_get_priv(dev);
return power_domain_on_lowlevel(&sbrt->pd);
}
int sandbox_power_domain_test_off_ll(struct udevice *dev)
{
struct sandbox_power_domain_test *sbrt = dev_get_priv(dev);
return power_domain_off_lowlevel(&sbrt->pd);
}
int sandbox_power_domain_test_free(struct udevice *dev)
{
struct sandbox_power_domain_test *sbrt = dev_get_priv(dev);
@@ -51,4 +65,5 @@ U_BOOT_DRIVER(sandbox_power_domain_test) = {
.id = UCLASS_MISC,
.of_match = sandbox_power_domain_test_ids,
.priv_auto = sizeof(struct sandbox_power_domain_test),
.flags = DM_FLAG_DEFAULT_PD_CTRL_OFF,
};

View File

@@ -64,8 +64,12 @@ static int sandbox_power_domain_bind(struct udevice *dev)
static int sandbox_power_domain_probe(struct udevice *dev)
{
struct power_domain_plat *plat = dev_get_uclass_plat(dev);
debug("%s(dev=%p)\n", __func__, dev);
plat->subdomains = 1;
return 0;
}

View File

@@ -472,7 +472,13 @@ static void fsl_qspi_prepare_lut(struct fsl_qspi *q,
op->addr.nbytes) {
for (i = 0; i < ARRAY_SIZE(lutval); i++)
qspi_writel(q, lutval[i], base + QUADSPI_AHB_LUT_REG(i));
qspi_writel(q, QUADSPI_BFGENCR_SEQID(SEQID_LUT_AHB),
q->iobase + QUADSPI_BFGENCR);
}
} else {
qspi_writel(q, QUADSPI_BFGENCR_SEQID(SEQID_LUT),
q->iobase + QUADSPI_BFGENCR);
}
/* lock LUT */
@@ -737,13 +743,6 @@ static int fsl_qspi_default_setup(struct fsl_qspi *q)
qspi_writel(q, 0, base + QUADSPI_BUF1IND);
qspi_writel(q, 0, base + QUADSPI_BUF2IND);
if (IS_ENABLED(CONFIG_FSL_QSPI_AHB_FULL_MAP))
qspi_writel(q, QUADSPI_BFGENCR_SEQID(SEQID_LUT_AHB),
q->iobase + QUADSPI_BFGENCR);
else
qspi_writel(q, QUADSPI_BFGENCR_SEQID(SEQID_LUT),
q->iobase + QUADSPI_BFGENCR);
qspi_writel(q, QUADSPI_RBCT_WMRK_MASK, base + QUADSPI_RBCT);
qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
QUADSPI_BUF3CR_ADATSZ(q->devtype_data->ahb_buf_size / 8),

View File

@@ -10,8 +10,6 @@
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
#include "siemens-env-common.h"
/* SPL config */
#ifdef CONFIG_XPL_BUILD
#define CFG_MALLOC_F_ADDR 0x00120000
@@ -36,57 +34,9 @@
#define AHAB_ENV "sec_boot=no\0"
#endif
#define MFG_ENV_SETTINGS_DEFAULT \
"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
"rdinit=/linuxrc " \
"clk_ignore_unused "\
"\0" \
"kboot=booti\0"\
"bootcmd_mfg=run mfgtool_args;" \
"if iminfo ${initrd_addr}; then " \
"if test ${tee} = yes; then " \
"bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; " \
"else " \
"booti ${loadaddr} ${initrd_addr} ${fdt_addr}; " \
"fi; " \
"else " \
"echo \"Run fastboot ...\"; fastboot 0; " \
"fi;\0"
/* Boot M4 */
#define M4_BOOT_ENV \
"m4_0_image=m4_0.bin\0" \
"loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} " \
"${loadaddr} ${m4_0_image}\0" \
"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
#define CFG_MFG_ENV_SETTINGS \
MFG_ENV_SETTINGS_DEFAULT \
"initrd_addr=0x83100000\0" \
"initrd_high=0xffffffffffffffff\0" \
"emmc_dev=0\0"
/* Initial environment variables */
#define CFG_EXTRA_ENV_SETTINGS \
CFG_MFG_ENV_SETTINGS \
M4_BOOT_ENV \
AHAB_ENV \
ENV_COMMON \
"script=boot.scr\0" \
"image=Image\0" \
"panel=NULL\0" \
"console=ttyLP2\0" \
"fdt_addr=0x83000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"cntr_addr=0x88000000\0" \
"cntr_file=os_cntr_signed.bin\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"netdev=eth0\0" \
"nfsopts=vers=3,udp,rsize=4096,wsize=4096,nolock rw\0" \
"hostname=capricorn\0" \
ENV_EMMC \
ENV_NET
AHAB_ENV
/* Default location for tftp and bootm */

View File

@@ -1,16 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2019 Siemens AG
*
*/
#ifndef __GIEDI_H
#define __GIEDI_H
#include "capricorn-common.h"
/* DDR3 board total DDR is 1 GB */
#undef PHYS_SDRAM_1_SIZE
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */
#endif /* __GIEDI_H */

View File

@@ -219,6 +219,8 @@ struct clk_composite {
const struct clk_ops *mux_ops;
const struct clk_ops *rate_ops;
const struct clk_ops *gate_ops;
struct udevice *dev;
};
#define to_clk_composite(_clk) container_of(_clk, struct clk_composite, clk)

View File

@@ -65,6 +65,15 @@ struct power_domain {
void *priv;
};
/**
* struct power_domain_plat - Per device accessible structure
* @subdomains: Number of subdomains covered by this device, required
* for refcounting
*/
struct power_domain_plat {
int subdomains;
};
/**
* power_domain_get - Get/request the power domain for a device.
*
@@ -147,37 +156,81 @@ static inline int power_domain_free(struct power_domain *power_domain)
#endif
/**
* power_domain_on - Enable power to a power domain.
* power_domain_on_lowlevel - Enable power to a power domain (with refcounting)
*
* @power_domain: A power domain struct that was previously successfully
* requested by power_domain_get().
* Return: 0 if OK, or a negative error code.
* Return: 0 if the transition has been performed correctly,
* -EALREADY if the domain is already on,
* a negative error code otherwise.
*/
#if CONFIG_IS_ENABLED(POWER_DOMAIN)
int power_domain_on(struct power_domain *power_domain);
int power_domain_on_lowlevel(struct power_domain *power_domain);
#else
static inline int power_domain_on(struct power_domain *power_domain)
static inline int power_domain_on_lowlevel(struct power_domain *power_domain)
{
return -ENOSYS;
}
#endif
/**
* power_domain_off - Disable power to a power domain.
* power_domain_on - Enable power to a power domain (ignores the actual state
* of the power domain)
*
* @power_domain: A power domain struct that was previously successfully
* requested by power_domain_get().
* Return: 0 if OK, or a negative error code.
* Return: a negative error code upon error during the transition, 0 otherwise.
*/
static inline int power_domain_on(struct power_domain *power_domain)
{
int ret;
ret = power_domain_on_lowlevel(power_domain);
if (ret == -EALREADY)
ret = 0;
return ret;
}
/**
* power_domain_off_lowlevel - Disable power to a power domain (with refcounting)
*
* @power_domain: A power domain struct that was previously successfully
* requested by power_domain_get().
* Return: 0 if the transition has been performed correctly,
* -EALREADY if the domain is already off,
* -EBUSY if another device is keeping the domain on (but the refcounter
* is decremented),
* a negative error code otherwise.
*/
#if CONFIG_IS_ENABLED(POWER_DOMAIN)
int power_domain_off(struct power_domain *power_domain);
int power_domain_off_lowlevel(struct power_domain *power_domain);
#else
static inline int power_domain_off(struct power_domain *power_domain)
static inline int power_domain_off_lowlevel(struct power_domain *power_domain)
{
return -ENOSYS;
}
#endif
/**
* power_domain_off - Disable power to a power domain (ignores the actual state
* of the power domain)
*
* @power_domain: A power domain struct that was previously successfully
* requested by power_domain_get().
* Return: a negative error code upon error during the transition, 0 otherwise.
*/
static inline int power_domain_off(struct power_domain *power_domain)
{
int ret;
ret = power_domain_off_lowlevel(power_domain);
if (ret == -EALREADY || ret == -EBUSY)
ret = 0;
return ret;
}
/**
* dev_power_domain_on - Enable power domains for a device .
*

View File

@@ -27,17 +27,26 @@ static int dm_test_power_domain(struct unit_test_state *uts)
ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "power-domain-test",
&dev_test));
ut_asserteq(1, sandbox_power_domain_query(dev_power_domain,
ut_asserteq(0, sandbox_power_domain_query(dev_power_domain,
TEST_POWER_DOMAIN));
ut_assertok(sandbox_power_domain_test_get(dev_test));
ut_assertok(sandbox_power_domain_test_on(dev_test));
ut_asserteq(0, sandbox_power_domain_query(dev_power_domain, 0));
ut_asserteq(1, sandbox_power_domain_query(dev_power_domain,
TEST_POWER_DOMAIN));
ut_asserteq(-EALREADY, sandbox_power_domain_test_on_ll(dev_test));
ut_asserteq(1, sandbox_power_domain_query(dev_power_domain,
TEST_POWER_DOMAIN));
ut_asserteq(-EBUSY, sandbox_power_domain_test_off_ll(dev_test));
ut_asserteq(1, sandbox_power_domain_query(dev_power_domain,
TEST_POWER_DOMAIN));
ut_assertok(sandbox_power_domain_test_off(dev_test));
ut_asserteq(0, sandbox_power_domain_query(dev_power_domain, 0));
ut_asserteq(0, sandbox_power_domain_query(dev_power_domain,
TEST_POWER_DOMAIN));
ut_asserteq(-EALREADY, sandbox_power_domain_test_off_ll(dev_test));
ut_asserteq(0, sandbox_power_domain_query(dev_power_domain,
TEST_POWER_DOMAIN));