Merge tag 'mediatek-for-next-2026-03-11' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next

A fix:
* Fixing compiling MT8195 due to some independent changes that were applied
  around the same time as MT8195 support was merged. (CI would not have caught
  this since we didn't have a defconfig until now).

And few small features:
* New defconfig for MT8395/Genio 1200 EVK.
* pinctrl support for MT8189-compatible SoCs.

arch/arm/mach-mediatek/Kconfig

@@ -149,7 +149,7 @@ config MTK_MEM_MAP_DDR_BASE_PHY
 
 config MTK_MEM_MAP_DDR_SIZE
 	hex "DDR .size in mem_map"
-	default 0x200000000 if TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8188
+	default 0x200000000 if TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8188 || TARGET_MT8195
 	default 0xc0000000 if TARGET_MT8365
 	default 0x80000000 if TARGET_MT7981 || TARGET_MT7986 || TARGET_MT8183
 	default 0x40000000 if TARGET_MT7622 || TARGET_MT8512

arch/arm/mach-mediatek/mt8195/init.c

@@ -68,24 +68,3 @@ int print_cpuinfo(void)
 	printf("CPU:   MediaTek MT8195\n");
 	return 0;
 }
-
-static struct mm_region mt8195_mem_map[] = {
-	{
-		/* DDR */
-		.virt = 0x40000000UL,
-		.phys = 0x40000000UL,
-		.size = 0x200000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
-	}, {
-		.virt = 0x00000000UL,
-		.phys = 0x00000000UL,
-		.size = 0x20000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
-			 PTE_BLOCK_NON_SHARE |
-			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-	}, {
-		0,
-	}
-};
-
-struct mm_region *mem_map = mt8195_mem_map;

board/mediatek/MAINTAINERS

@@ -13,3 +13,8 @@ M:	Julien Masson <jmasson@baylibre.com>
 M:	Macpaul Lin <Macpaul.Lin@mediatek.com>
 S:	Maintained
 F:	configs/mt8390_evk_defconfig
+
+MT8395 EVK
+M:	Macpaul Lin <Macpaul.Lin@mediatek.com>
+S:	Maintained
+F:	configs/mt8395_evk_defconfig

configs/mt8395_evk_defconfig

@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=13000000
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x4c000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mediatek/mt8395-genio-1200-evk"
+CONFIG_TARGET_MT8195=y
+CONFIG_SYS_LOAD_ADDR=0x60000000
+CONFIG_IDENT_STRING=" mt8395-evk"
+# CONFIG_BOARD_INIT is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_OF_UPSTREAM=y
+CONFIG_CLK=y
+CONFIG_MMC_MTK=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT8195=y
+CONFIG_BAUDRATE=921600
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_WDT=y
+CONFIG_WDT_MTK=y

drivers/pinctrl/mediatek/Kconfig

@@ -42,6 +42,10 @@ config PINCTRL_MT8195
 	bool "MT8195 SoC pinctrl driver"
 	select PINCTRL_MTK
 
+config PINCTRL_MT8189
+	bool "MT8189 SoC pinctrl driver"
+	select PINCTRL_MTK
+
 config PINCTRL_MT8365
 	bool "MT8365 SoC pinctrl driver"
 	select PINCTRL_MTK

drivers/pinctrl/mediatek/Makefile

@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_MT7987) += pinctrl-mt7987.o
 obj-$(CONFIG_PINCTRL_MT7988) += pinctrl-mt7988.o
 obj-$(CONFIG_PINCTRL_MT8188) += pinctrl-mt8188.o
 obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o
+obj-$(CONFIG_PINCTRL_MT8189) += pinctrl-mt8189.o
 obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o
 obj-$(CONFIG_PINCTRL_MT8512) += pinctrl-mt8512.o
 obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o

drivers/pinctrl/mediatek/pinctrl-mtk-common.c

@@ -856,6 +856,9 @@ int mtk_pinctrl_common_probe(struct udevice *dev,
 	if (!base_calc)
 		nbase_names = 1;
 
+	if (nbase_names > MAX_BASE_CALC)
+		return -ENOSPC;
+
 	for (i = 0; i < nbase_names; i++) {
 		if (soc->base_names)
 			addr = dev_read_addr_name(dev, soc->base_names[i]);

drivers/pinctrl/mediatek/pinctrl-mtk-common.h

@@ -9,7 +9,7 @@
 #define MTK_PINCTRL_V0 0x0
 #define MTK_PINCTRL_V1 0x1
 #define BASE_CALC_NONE 0
-#define MAX_BASE_CALC 10
+#define MAX_BASE_CALC 15
 
 #define MTK_RANGE(_a)		{ .range = (_a), .nranges = ARRAY_SIZE(_a), }