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imx9: Add i.MX94 CPU type and SoC-level Kconfig
Introduce support for the new i.MX94 processor, including its CPU type and SoC-level Kconfig entry. The i.MX94 is a new member of the i.MX9 family. It uses a System Manager to handle system-level functions such as power, clock, sensor and pin control. The System Manager runs on a Cortex-M processor, while the Cortex-A processor communicates with it via the ARM SCMI protocol and a messaging unit. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
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@@ -78,6 +78,8 @@
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#define MXC_CPU_IMX95 0x1C1 /* dummy ID */
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#define MXC_CPU_IMX94 0x1C2 /* dummy ID */
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#define MXC_SOC_MX6 0x60
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#define MXC_SOC_MX7 0x70
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#define MXC_SOC_IMX8M 0x80
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@@ -97,6 +97,7 @@ struct bd_info;
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#define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302))
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#define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301))
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#define is_imx94() (is_cpu_type(MXC_CPU_IMX94))
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#define is_imx95() (is_cpu_type(MXC_CPU_IMX95))
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#define is_imx9121() (is_cpu_type(MXC_CPU_IMX9121))
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@@ -38,6 +38,15 @@ config IMX95
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select SPL_IMX_CONTAINER_USE_TRAMPOLINE
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select IMX_PQC_SUPPORT if !IMX95_A0
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config IMX94
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bool
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select ARMV8_SPL_EXCEPTION_VECTORS
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select DM_MAILBOX
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select IMX9
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select IMX_PQC_SUPPORT
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select SCMI_FIRMWARE
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select SPL_IMX_CONTAINER_USE_TRAMPOLINE
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config SYS_SOC
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default "imx9"
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