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reset: Add RPi5 rescal reset facilities
A driver for Broadcom rescal reset controllers ported from linux/drivers/reset/reset-brcmstb-rescal.c to U-Boot. Signed-off-by: Torsten Duwe <duwe@suse.de> Co-authored-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Tested-by: Pedro Falcato <pfalcato@suse.de>
This commit is contained in:
committed by
Peter Robinson
parent
64ae1351b5
commit
af4f915fd6
@@ -45,6 +45,7 @@ CONFIG_PCI_BRCMSTB=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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CONFIG_RESET_BRCMSTB=y
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CONFIG_RESET_BRCMSTB_RESCAL=y
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CONFIG_DM_RNG=y
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CONFIG_RNG_IPROC200=y
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# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
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@@ -72,6 +72,14 @@ config RESET_BRCMSTB
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If you wish to use reset resources managed by the Broadcom
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Reset Controller, say Y here. Otherwise, say N.
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config RESET_BRCMSTB_RESCAL
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depends on ARCH_BCM283X
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bool "Generic Rescal Reset controller driver for Broadcom"
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help
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Support rescal reset controller on Broadcom.
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If you wish to use reset resources managed by the Broadcom
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Reset Controller, say Y here. Otherwise, say N.
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config RESET_UNIPHIER
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bool "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER
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@@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
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obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
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obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
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obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o
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obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o
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103
drivers/reset/reset-brcmstb-rescal.c
Normal file
103
drivers/reset/reset-brcmstb-rescal.c
Normal file
@@ -0,0 +1,103 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Broadcom STB generic reset controller
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*
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* Copyright (C) 2024 EPAM Systems
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* Moved from linux kernel:
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* Copyright (C) 2018-2020 Broadcom
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*/
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#include <asm/io.h>
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <errno.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <log.h>
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#include <malloc.h>
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#include <reset-uclass.h>
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#define BRCM_RESCAL_START 0x0
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#define BRCM_RESCAL_START_BIT BIT(0)
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#define BRCM_RESCAL_CTRL 0x4
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#define BRCM_RESCAL_STATUS 0x8
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#define BRCM_RESCAL_STATUS_BIT BIT(0)
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struct brcm_rescal_reset {
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void __iomem *base;
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};
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/* Also doubles a deassert */
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static int brcm_rescal_reset_set(struct reset_ctl *rst)
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{
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struct brcm_rescal_reset *data = dev_get_priv(rst->dev);
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void __iomem *base = data->base;
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u32 reg;
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int ret;
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reg = readl(base + BRCM_RESCAL_START);
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writel(reg | BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START);
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reg = readl(base + BRCM_RESCAL_START);
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if (!(reg & BRCM_RESCAL_START_BIT)) {
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dev_err(rst->dev, "failed to start SATA/PCIe rescal\n");
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return -EIO;
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}
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ret = readl_poll_timeout(base + BRCM_RESCAL_STATUS, reg,
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(reg & BRCM_RESCAL_STATUS_BIT), 100);
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if (ret) {
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dev_err(rst->dev, "time out on SATA/PCIe rescal\n");
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return ret;
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}
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reg = readl(base + BRCM_RESCAL_START);
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writel(reg & ~BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START);
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dev_dbg(rst->dev, "SATA/PCIe rescal success\n");
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return 0;
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}
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/* A dummy function - deassert/reset does all the work */
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static int brcm_rescal_reset_assert(struct reset_ctl *rst)
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{
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return 0;
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}
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static int brcm_rescal_reset_xlate(struct reset_ctl *reset_ctl,
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struct ofnode_phandle_args *args)
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{
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/* This is needed if #reset-cells == 0. */
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return 0;
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}
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static const struct reset_ops brcm_rescal_reset_ops = {
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.rst_deassert = brcm_rescal_reset_set,
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.rst_assert = brcm_rescal_reset_assert,
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.of_xlate = brcm_rescal_reset_xlate,
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};
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static int brcm_rescal_reset_probe(struct udevice *dev)
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{
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struct brcm_rescal_reset *data = dev_get_priv(dev);
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data->base = dev_remap_addr(dev);
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if (!data->base)
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return -EINVAL;
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return 0;
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}
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static const struct udevice_id brcm_rescal_reset_of_match[] = {
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{.compatible = "brcm,bcm7216-pcie-sata-rescal"},
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{},
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};
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U_BOOT_DRIVER(brcmstb_reset_rescal) = {
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.name = "brcmstb-reset-rescal",
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.id = UCLASS_RESET,
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.of_match = brcm_rescal_reset_of_match,
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.ops = &brcm_rescal_reset_ops,
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.probe = brcm_rescal_reset_probe,
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.priv_auto = sizeof(struct brcm_rescal_reset),
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};
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