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rockchip: odroid-go2: Move SoC common overrides into a SoC u-boot.dtsi
Add a new common rk3326-u-boot.dtsi and move the SoC common overrides into it. This should not contain any changes other than a possible reorder of nodes and props. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
committed by
Kever Yang
parent
e338dc015b
commit
bf6c7cce09
@@ -3,56 +3,7 @@
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* Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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chosen {
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u-boot,spl-boot-order = &sdmmc;
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};
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dmc {
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bootph-all;
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compatible = "rockchip,px30-dmc", "syscon";
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reg = <0x0 0xff2a0000 0x0 0x1000>;
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};
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rng: rng@ff0b0000 {
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compatible = "rockchip,cryptov2-rng";
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reg = <0x0 0xff0b0000 0x0 0x4000>;
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};
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};
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&cru {
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bootph-all;
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};
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&gpio0 {
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gpio-ranges = <&pinctrl 0 0 32>;
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};
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&gpio1 {
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gpio-ranges = <&pinctrl 0 32 32>;
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};
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&gpio2 {
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gpio-ranges = <&pinctrl 0 64 32>;
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};
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&gpio3 {
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gpio-ranges = <&pinctrl 0 96 32>;
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};
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&grf {
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bootph-all;
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};
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&pmucru {
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bootph-all;
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};
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&pmugrf {
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bootph-all;
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};
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#include "rk3326-u-boot.dtsi"
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&rk817 {
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regulators {
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@@ -73,33 +24,14 @@
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bootph-all;
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};
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&sdmmc {
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bootph-pre-ram;
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bootph-some-ram;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sfc {
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bootph-some-ram;
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};
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&{/spi@ff3a0000/flash@0} {
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bootph-pre-ram;
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bootph-some-ram;
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flash@0 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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};
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&uart1 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&uart2 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&xin24m {
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bootph-all;
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};
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76
arch/arm/dts/rk3326-u-boot.dtsi
Normal file
76
arch/arm/dts/rk3326-u-boot.dtsi
Normal file
@@ -0,0 +1,76 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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chosen {
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u-boot,spl-boot-order = &sdmmc;
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};
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dmc {
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compatible = "rockchip,px30-dmc", "syscon";
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reg = <0x0 0xff2a0000 0x0 0x1000>;
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bootph-all;
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};
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rng: rng@ff0b0000 {
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compatible = "rockchip,cryptov2-rng";
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reg = <0x0 0xff0b0000 0x0 0x4000>;
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};
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};
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&cru {
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bootph-all;
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};
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&gpio0 {
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gpio-ranges = <&pinctrl 0 0 32>;
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};
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&gpio1 {
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gpio-ranges = <&pinctrl 0 32 32>;
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};
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&gpio2 {
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gpio-ranges = <&pinctrl 0 64 32>;
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};
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&gpio3 {
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gpio-ranges = <&pinctrl 0 96 32>;
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};
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&grf {
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bootph-all;
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};
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&pmucru {
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bootph-all;
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};
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&pmugrf {
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bootph-all;
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};
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&sdmmc {
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bootph-pre-ram;
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bootph-some-ram;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&sfc {
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bootph-some-ram;
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};
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&uart2 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&xin24m {
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bootph-all;
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};
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