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armv8/fsl-lsch2: correct the config description of DSPI clock divider
It is derived from Platform clock instead of Platform PLL frequency. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@@ -307,7 +307,7 @@ config SYS_FSL_DSPI_CLK_DIV
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default 2
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help
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This is the divider that is used to derive DSPI clock from Platform
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PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider.
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clock, in another word DSPI_clk = Platform_clk / this_divider.
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config SYS_FSL_DUART_CLK_DIV
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int "DUART clock divider"
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