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arch: arm: agilex: Clean up DT settings in U-Boot dtsi files
Reorganize misplaced properties by moving board-common settings from socfpga_agilex_socdk-u-boot.dtsi to socfpga_agilex-u-boot.dtsi to maintain proper separation between common and board-level configurations. Signed-off-by: Tingting Meng <tingting.meng@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
This commit is contained in:
committed by
Tien Fong Chee
parent
71916a72f1
commit
c465ff14a3
@@ -10,6 +10,13 @@
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#include "socfpga_soc64_fit-u-boot.dtsi"
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/{
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aliases {
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spi0 = &qspi;
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i2c0 = &i2c1;
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sysmgr = &sysmgr;
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freeze_br0 = &freeze_controller;
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};
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memory {
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#address-cells = <2>;
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#size-cells = <2>;
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@@ -19,6 +26,12 @@
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soc {
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bootph-all;
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freeze_controller: freeze_controller@f9000450 {
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compatible = "altr,freeze-bridge-controller";
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reg = <0xf9000450 0x00000010>;
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status = "disabled";
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};
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ccu: cache-controller@f7000000 {
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compatible = "arteris,ncore-ccu";
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reg = <0xf7000000 0x100900>;
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@@ -45,6 +58,7 @@
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&i2c1 {
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reset-names = "i2c";
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status = "okay";
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};
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&i2c2 {
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@@ -171,3 +185,9 @@
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&watchdog0 {
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bootph-all;
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};
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#if !defined(CONFIG_SOCFPGA_SECURE_VAB_AUTH)
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&binman {
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/delete-node/ kernel;
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};
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#endif
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@@ -14,20 +14,6 @@
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u-boot,spl-boot-order = &mmc,&flash0,&nand;
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};
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aliases {
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spi0 = &qspi;
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i2c0 = &i2c1;
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freeze_br0 = &freeze_controller;
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};
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soc {
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freeze_controller: freeze_controller@f9000450 {
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compatible = "altr,freeze-bridge-controller";
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reg = <0xf9000450 0x00000010>;
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status = "disabled";
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};
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};
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memory {
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/* 8GB */
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reg = <0 0x00000000 0 0x80000000>,
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@@ -43,10 +29,6 @@
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/delete-property/ cdns,read-delay;
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};
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&i2c1 {
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status = "okay";
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};
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&nand {
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status = "okay";
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nand-bus-width = <16>;
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@@ -62,13 +44,3 @@
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&qspi {
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status = "okay";
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};
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&watchdog0 {
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bootph-all;
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};
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#if !defined(CONFIG_SOCFPGA_SECURE_VAB_AUTH)
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&binman {
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/delete-node/ kernel;
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};
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#endif
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