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pinctrl: qcom: Add ipq5424 pinctrl driver
Add pinctrl driver for the TLMM block found in the ipq5424 SoC. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Casey Connolly <casey.connolly@linaro.org> Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
This commit is contained in:
Varadarajan Narayanan
committed by
Casey Connolly
Casey Connolly
parent
d7fb15c17d
commit
c4aa86c04f
@@ -27,6 +27,13 @@ config PINCTRL_QCOM_IPQ4019
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Say Y here to enable support for pinctrl on the IPQ4019 SoC,
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as well as the associated GPIO driver.
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config PINCTRL_QCOM_IPQ5424
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bool "Qualcomm IPQ5424 Pinctrl"
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select PINCTRL_QCOM
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help
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Say Y here to enable support for pinctrl on the IPQ5424 SoC,
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as well as the associated GPIO driver.
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config PINCTRL_QCOM_IPQ9574
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bool "Qualcomm IPQ9574 Pinctrl"
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select PINCTRL_QCOM
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@@ -5,6 +5,7 @@
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obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o
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obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o
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obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o
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obj-$(CONFIG_PINCTRL_QCOM_IPQ5424) += pinctrl-ipq5424.o
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obj-$(CONFIG_PINCTRL_QCOM_IPQ9574) += pinctrl-ipq9574.o
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obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
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obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o
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322
drivers/pinctrl/qcom/pinctrl-ipq5424.c
Normal file
322
drivers/pinctrl/qcom/pinctrl-ipq5424.c
Normal file
@@ -0,0 +1,322 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2016-2018,2020 The Linux Foundation. All rights reserved.
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dm.h>
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#include "pinctrl-qcom.h"
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#define MAX_PIN_NAME_LEN 32
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static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
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enum ipq5424_functions {
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msm_mux_atest_char,
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msm_mux_atest_char0,
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msm_mux_atest_char1,
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msm_mux_atest_char2,
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msm_mux_atest_char3,
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msm_mux_atest_tic,
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msm_mux_audio_pri,
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msm_mux_audio_pri0,
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msm_mux_audio_pri1,
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msm_mux_audio_sec,
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msm_mux_audio_sec0,
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msm_mux_audio_sec1,
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msm_mux_core_voltage,
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msm_mux_cri_trng0,
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msm_mux_cri_trng1,
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msm_mux_cri_trng2,
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msm_mux_cri_trng3,
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msm_mux_cxc_clk,
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msm_mux_cxc_data,
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msm_mux_dbg_out,
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msm_mux_gcc_plltest,
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msm_mux_gcc_tlmm,
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msm_mux_gpio,
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msm_mux_i2c0_scl,
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msm_mux_i2c0_sda,
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msm_mux_i2c1_scl,
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msm_mux_i2c1_sda,
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msm_mux_i2c11,
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msm_mux_mac0,
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msm_mux_mac1,
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msm_mux_mdc_mst,
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msm_mux_mdc_slv,
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msm_mux_mdio_mst,
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msm_mux_mdio_slv,
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msm_mux_pcie0_clk,
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msm_mux_pcie0_wake,
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msm_mux_pcie1_clk,
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msm_mux_pcie1_wake,
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msm_mux_pcie2_clk,
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msm_mux_pcie2_wake,
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msm_mux_pcie3_clk,
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msm_mux_pcie3_wake,
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msm_mux_pll_test,
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msm_mux_prng_rosc0,
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msm_mux_prng_rosc1,
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msm_mux_prng_rosc2,
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msm_mux_prng_rosc3,
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msm_mux_PTA0_0,
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msm_mux_PTA0_1,
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msm_mux_PTA0_2,
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msm_mux_PTA10,
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msm_mux_PTA11,
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msm_mux_pwm0,
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msm_mux_pwm1,
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msm_mux_pwm2,
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msm_mux_qdss_cti_trig_in_a0,
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msm_mux_qdss_cti_trig_out_a0,
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msm_mux_qdss_cti_trig_in_a1,
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msm_mux_qdss_cti_trig_out_a1,
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msm_mux_qdss_cti_trig_in_b0,
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msm_mux_qdss_cti_trig_out_b0,
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msm_mux_qdss_cti_trig_in_b1,
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msm_mux_qdss_cti_trig_out_b1,
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msm_mux_qdss_traceclk_a,
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msm_mux_qdss_tracectl_a,
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msm_mux_qdss_tracedata_a,
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msm_mux_qspi_clk,
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msm_mux_qspi_cs,
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msm_mux_qspi_data,
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msm_mux_resout,
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msm_mux_rx0,
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msm_mux_rx1,
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msm_mux_rx2,
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msm_mux_sdc_clk,
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msm_mux_sdc_cmd,
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msm_mux_sdc_data,
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msm_mux_spi0_clk,
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msm_mux_spi0_cs,
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msm_mux_spi0_miso,
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msm_mux_spi0_mosi,
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msm_mux_spi1,
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msm_mux_spi10,
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msm_mux_spi11,
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msm_mux_tsens_max,
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msm_mux_uart0,
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msm_mux_uart1,
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msm_mux_wci_txd,
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msm_mux_wci_rxd,
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msm_mux_wsi_clk,
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msm_mux_wsi_data,
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msm_mux__,
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};
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#define MSM_PIN_FUNCTION(fname) \
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[msm_mux_##fname] = {#fname, msm_mux_##fname}
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static const struct pinctrl_function ipq5424_functions[] = {
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MSM_PIN_FUNCTION(atest_char),
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MSM_PIN_FUNCTION(atest_char0),
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MSM_PIN_FUNCTION(atest_char1),
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MSM_PIN_FUNCTION(atest_char2),
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MSM_PIN_FUNCTION(atest_char3),
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MSM_PIN_FUNCTION(atest_tic),
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MSM_PIN_FUNCTION(audio_pri),
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MSM_PIN_FUNCTION(audio_pri0),
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MSM_PIN_FUNCTION(audio_pri1),
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MSM_PIN_FUNCTION(audio_sec),
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MSM_PIN_FUNCTION(audio_sec0),
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MSM_PIN_FUNCTION(audio_sec1),
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MSM_PIN_FUNCTION(core_voltage),
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MSM_PIN_FUNCTION(cri_trng0),
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MSM_PIN_FUNCTION(cri_trng1),
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MSM_PIN_FUNCTION(cri_trng2),
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MSM_PIN_FUNCTION(cri_trng3),
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MSM_PIN_FUNCTION(cxc_clk),
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MSM_PIN_FUNCTION(cxc_data),
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MSM_PIN_FUNCTION(dbg_out),
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MSM_PIN_FUNCTION(gcc_plltest),
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MSM_PIN_FUNCTION(gcc_tlmm),
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MSM_PIN_FUNCTION(gpio),
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MSM_PIN_FUNCTION(i2c0_scl),
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MSM_PIN_FUNCTION(i2c0_sda),
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MSM_PIN_FUNCTION(i2c1_scl),
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MSM_PIN_FUNCTION(i2c1_sda),
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MSM_PIN_FUNCTION(i2c11),
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MSM_PIN_FUNCTION(mac0),
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MSM_PIN_FUNCTION(mac1),
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MSM_PIN_FUNCTION(mdc_mst),
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MSM_PIN_FUNCTION(mdc_slv),
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MSM_PIN_FUNCTION(mdio_mst),
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MSM_PIN_FUNCTION(mdio_slv),
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MSM_PIN_FUNCTION(pcie0_clk),
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MSM_PIN_FUNCTION(pcie0_wake),
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MSM_PIN_FUNCTION(pcie1_clk),
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MSM_PIN_FUNCTION(pcie1_wake),
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MSM_PIN_FUNCTION(pcie2_clk),
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MSM_PIN_FUNCTION(pcie2_wake),
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MSM_PIN_FUNCTION(pcie3_clk),
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MSM_PIN_FUNCTION(pcie3_wake),
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MSM_PIN_FUNCTION(pll_test),
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MSM_PIN_FUNCTION(prng_rosc0),
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MSM_PIN_FUNCTION(prng_rosc1),
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MSM_PIN_FUNCTION(prng_rosc2),
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MSM_PIN_FUNCTION(prng_rosc3),
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MSM_PIN_FUNCTION(PTA0_0),
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MSM_PIN_FUNCTION(PTA0_1),
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MSM_PIN_FUNCTION(PTA0_2),
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MSM_PIN_FUNCTION(PTA10),
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MSM_PIN_FUNCTION(PTA11),
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MSM_PIN_FUNCTION(pwm0),
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MSM_PIN_FUNCTION(pwm1),
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MSM_PIN_FUNCTION(pwm2),
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MSM_PIN_FUNCTION(qdss_cti_trig_in_a0),
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MSM_PIN_FUNCTION(qdss_cti_trig_out_a0),
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MSM_PIN_FUNCTION(qdss_cti_trig_in_a1),
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MSM_PIN_FUNCTION(qdss_cti_trig_out_a1),
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MSM_PIN_FUNCTION(qdss_cti_trig_in_b0),
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MSM_PIN_FUNCTION(qdss_cti_trig_out_b0),
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MSM_PIN_FUNCTION(qdss_cti_trig_in_b1),
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MSM_PIN_FUNCTION(qdss_cti_trig_out_b1),
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MSM_PIN_FUNCTION(qdss_traceclk_a),
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MSM_PIN_FUNCTION(qdss_tracectl_a),
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MSM_PIN_FUNCTION(qdss_tracedata_a),
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MSM_PIN_FUNCTION(qspi_clk),
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MSM_PIN_FUNCTION(qspi_cs),
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MSM_PIN_FUNCTION(qspi_data),
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MSM_PIN_FUNCTION(resout),
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MSM_PIN_FUNCTION(rx0),
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MSM_PIN_FUNCTION(rx1),
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MSM_PIN_FUNCTION(rx2),
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MSM_PIN_FUNCTION(sdc_clk),
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MSM_PIN_FUNCTION(sdc_cmd),
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MSM_PIN_FUNCTION(sdc_data),
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MSM_PIN_FUNCTION(spi0_clk),
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MSM_PIN_FUNCTION(spi0_cs),
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MSM_PIN_FUNCTION(spi0_miso),
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MSM_PIN_FUNCTION(spi0_mosi),
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MSM_PIN_FUNCTION(spi1),
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MSM_PIN_FUNCTION(spi10),
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MSM_PIN_FUNCTION(spi11),
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MSM_PIN_FUNCTION(tsens_max),
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MSM_PIN_FUNCTION(uart0),
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MSM_PIN_FUNCTION(uart1),
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MSM_PIN_FUNCTION(wci_txd),
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MSM_PIN_FUNCTION(wci_rxd),
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MSM_PIN_FUNCTION(wsi_clk),
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MSM_PIN_FUNCTION(wsi_data),
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};
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typedef unsigned int msm_pin_function[10];
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#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)\
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[id] = { msm_mux_gpio, /* gpio mode */ \
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msm_mux_##f1, \
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msm_mux_##f2, \
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msm_mux_##f3, \
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msm_mux_##f4, \
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msm_mux_##f5, \
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msm_mux_##f6, \
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msm_mux_##f7, \
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msm_mux_##f8, \
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msm_mux_##f9, \
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}
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static const msm_pin_function ipq5424_pin_functions[] = {
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PINGROUP(0, sdc_data, qspi_data, pwm2, wci_txd, wci_rxd, _, _, _, _),
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PINGROUP(1, sdc_data, qspi_data, pwm2, wci_txd, wci_rxd, _, _, _, _),
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PINGROUP(2, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
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PINGROUP(3, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
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PINGROUP(4, sdc_cmd, qspi_cs, _, _, _, _, _, _, _),
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PINGROUP(5, sdc_clk, qspi_clk, _, _, _, _, _, _, _),
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PINGROUP(6, spi0_clk, pwm1, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
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PINGROUP(7, spi0_cs, pwm1, _, cri_trng1, qdss_tracedata_a, _, _, _, _),
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PINGROUP(8, spi0_miso, pwm1, wci_txd, wci_rxd, _, cri_trng2, qdss_tracedata_a, _, _),
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PINGROUP(9, spi0_mosi, pwm1, _, cri_trng3, qdss_tracedata_a, _, _, _, _),
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PINGROUP(10, uart0, pwm0, spi11, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
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PINGROUP(11, uart0, pwm0, spi1, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
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PINGROUP(12, uart0, pwm0, spi11, _, prng_rosc0, qdss_tracedata_a, _, _, _),
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PINGROUP(13, uart0, pwm0, spi11, _, prng_rosc1, qdss_tracedata_a, _, _, _),
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PINGROUP(14, i2c0_scl, tsens_max, _, prng_rosc2, qdss_tracedata_a, _, _, _, _),
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PINGROUP(15, i2c0_sda, _, prng_rosc3, qdss_tracedata_a, _, _, _, _, _),
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PINGROUP(16, core_voltage, i2c1_scl, _, _, _, _, _, _, _),
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PINGROUP(17, core_voltage, i2c1_sda, _, _, _, _, _, _, _),
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PINGROUP(18, _, _, _, _, _, _, _, _, _),
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PINGROUP(19, _, _, _, _, _, _, _, _, _),
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PINGROUP(20, mdc_slv, atest_char0, _, qdss_tracedata_a, _, _, _, _, _),
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PINGROUP(21, mdio_slv, atest_char1, _, qdss_tracedata_a, _, _, _, _, _),
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PINGROUP(22, mdc_mst, atest_char2, _, _, _, _, _, _, _),
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PINGROUP(23, mdio_mst, atest_char3, _, _, _, _, _, _, _),
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PINGROUP(24, pcie0_clk, PTA10, mac0, _, wsi_clk, _, atest_char, qdss_cti_trig_out_a0, _),
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PINGROUP(25, _, _, _, _, _, _, _, _, _),
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PINGROUP(26, pcie0_wake, PTA10, mac0, _, wsi_data, _, qdss_cti_trig_in_a0, _, _),
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PINGROUP(27, pcie1_clk, i2c11, PTA10, wsi_clk, qdss_cti_trig_out_a1, _, _, _, _),
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PINGROUP(28, _, _, _, _, _, _, _, _, _),
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PINGROUP(29, pcie1_wake, i2c11, wsi_data, qdss_cti_trig_in_a1, _, _, _, _, _),
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PINGROUP(30, pcie2_clk, PTA11, mac1, qdss_cti_trig_out_b0, _, _, _, _, _),
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PINGROUP(31, _, _, _, _, _, _, _, _, _),
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PINGROUP(32, pcie2_wake, PTA11, mac1, audio_pri0, audio_pri0, qdss_cti_trig_in_b0, _, _, _),
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PINGROUP(33, pcie3_clk, PTA11, audio_pri1, audio_pri1, qdss_cti_trig_out_b1, _, _, _, _),
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PINGROUP(34, _, _, _, _, _, _, _, _, _),
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PINGROUP(35, pcie3_wake, audio_sec1, audio_sec1, qdss_cti_trig_in_b1, _, _, _, _, _),
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PINGROUP(36, audio_pri, spi1, audio_sec0, audio_sec0, qdss_tracedata_a, _, _, _, _),
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PINGROUP(37, audio_pri, spi1, rx2, qdss_tracedata_a, _, _, _, _, _),
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PINGROUP(38, audio_pri, spi1, pll_test, rx1, qdss_tracedata_a, _, _, _, _),
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PINGROUP(39, audio_pri, rx0, _, qdss_tracedata_a, _, _, _, _, _),
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PINGROUP(40, PTA0_0, wci_txd, wci_rxd, _, atest_tic, _, _, _, _),
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PINGROUP(41, PTA0_1, wci_txd, wci_rxd, cxc_data, _, _, _, _, _),
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PINGROUP(42, PTA0_2, cxc_clk, _, _, _, _, _, _, _),
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PINGROUP(43, uart1, gcc_plltest, _, _, _, _, _, _, _),
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PINGROUP(44, uart1, gcc_tlmm, _, _, _, _, _, _, _),
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PINGROUP(45, spi10, rx2, audio_sec, gcc_plltest, _, qdss_traceclk_a, _, _, _),
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PINGROUP(46, spi1, rx1, audio_sec, dbg_out, qdss_tracectl_a, _, _, _, _),
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PINGROUP(47, spi10, rx0, audio_sec, _, _, _, _, _, _),
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PINGROUP(48, spi10, audio_sec, _, _, _, _, _, _, _),
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PINGROUP(49, resout, _, _, _, _, _, _, _, _),
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};
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static const char *ipq5424_get_function_name(struct udevice *dev,
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unsigned int selector)
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{
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return ipq5424_functions[selector].name;
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}
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static const char *ipq5424_get_pin_name(struct udevice *dev,
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unsigned int selector)
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{
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snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
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return pin_name;
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}
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static int ipq5424_get_function_mux(unsigned int pin, unsigned int selector)
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{
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unsigned int i;
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const msm_pin_function *func = ipq5424_pin_functions + pin;
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for (i = 0; i < 10; i++)
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if ((*func)[i] == selector)
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return i;
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debug("Can't find requested function for pin:selector %u:%u\n",
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pin, selector);
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return -EINVAL;
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}
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static const struct msm_pinctrl_data ipq5424_data = {
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.pin_data = {
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.pin_count = 49,
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},
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.functions_count = ARRAY_SIZE(ipq5424_functions),
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.get_function_name = ipq5424_get_function_name,
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.get_function_mux = ipq5424_get_function_mux,
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.get_pin_name = ipq5424_get_pin_name,
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};
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static const struct udevice_id msm_pinctrl_ids[] = {
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{ .compatible = "qcom,ipq5424-tlmm", .data = (ulong)&ipq5424_data },
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{ /* Sentinal */ }
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};
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U_BOOT_DRIVER(pinctrl_ipq5424) = {
|
||||
.name = "pinctrl_ipq5424",
|
||||
.id = UCLASS_NOP,
|
||||
.of_match = msm_pinctrl_ids,
|
||||
.ops = &msm_pinctrl_ops,
|
||||
.bind = msm_pinctrl_bind,
|
||||
.flags = DM_FLAG_PRE_RELOC,
|
||||
};
|
||||
Reference in New Issue
Block a user