arm: dts: k3-am6xx: Fix FIT image memory overlap in binman configurations

Fix memory overlaps in FIT image configurations for TI AM62x and AM64x
PHYCore and SK boards.

The overlaps occurred in two categories:

1. TI firmware stub images (tifsstub-hs, tifsstub-fs, tifsstub-gp):
   These mutually exclusive firmware variants were incorrectly assigned
   the same load address within FIT configurations, causing overlap
   detection to fail. Adjust addresses with 64KB spacing:
   - tifsstub-hs: Keep original address
   - tifsstub-fs: Move to +64KB offset
   - tifsstub-gp: Move to +128KB offset

2. Device tree overlay images (som-no-rtc, som-no-spi, som-no-eth):
   These overlay files had insufficient spacing between load addresses,
   causing actual memory overlaps. Increase spacing to 8KB boundaries
   to accommodate overlay sizes safely.

An upcoming commit will validate if the memory region is overlapped

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
This commit is contained in:
Aristo Chen
2025-09-14 10:59:29 +00:00
committed by Tom Rini
parent a06733fc83
commit cbc4da1dce
6 changed files with 37 additions and 37 deletions

View File

@@ -234,8 +234,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc10000>;
entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -247,8 +247,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc20000>;
entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
@@ -322,7 +322,7 @@
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F001000>;
load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
@@ -337,7 +337,7 @@
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
load = <0x8F002000>;
load = <0x8F004000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
@@ -352,7 +352,7 @@
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F003000>;
load = <0x8F006000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;
@@ -479,8 +479,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc10000>;
entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -492,8 +492,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc20000>;
entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};

View File

@@ -231,8 +231,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc10000>;
entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -244,8 +244,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc20000>;
entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
@@ -362,8 +362,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc10000>;
entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -375,8 +375,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc20000>;
entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};

View File

@@ -219,8 +219,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc10000>;
entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -232,8 +232,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc20000>;
entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};
@@ -346,8 +346,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc10000>;
entry = <0x9dc10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -359,8 +359,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-gp";
load = <0x9dc00000>;
entry = <0x9dc00000>;
load = <0x9dc20000>;
entry = <0x9dc20000>;
blob-ext {
filename = "tifsstub.bin_gp";
};

View File

@@ -184,8 +184,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9ca00000>;
entry = <0x9ca00000>;
load = <0x9ca10000>;
entry = <0x9ca10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};
@@ -260,7 +260,7 @@
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F001000>;
load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
@@ -275,7 +275,7 @@
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
load = <0x8F002000>;
load = <0x8F004000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
@@ -290,7 +290,7 @@
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F003000>;
load = <0x8F006000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;

View File

@@ -168,8 +168,8 @@
arch = "arm32";
compression = "none";
os = "tifsstub-fs";
load = <0x9ca00000>;
entry = <0x9ca00000>;
load = <0x9ca10000>;
entry = <0x9ca10000>;
blob-ext {
filename = "tifsstub.bin_fs";
};

View File

@@ -371,7 +371,7 @@
description = "k3-am6xx-phycore-disable-spi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F001000>;
load = <0x8F002000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_spi_not_dtbo>;
@@ -386,7 +386,7 @@
description = "k3-am6xx-phycore-disable-eth-phy";
type = "flat_dt";
compression = "none";
load = <0x8F002000>;
load = <0x8F004000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_eth_phy_dtbo>;
@@ -401,7 +401,7 @@
description = "k3-am6xx-phycore-qspi-nor";
type = "flat_dt";
compression = "none";
load = <0x8F003000>;
load = <0x8F006000>;
arch = "arm";
ti-secure {
content = <&am6xx_phycore_disable_qspi_nor_dtbo>;